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    Searched refs:dcfclk_khz (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn10/
amdgpu_rv1_clk_mgr.c 170 || new_clocks->dcfclk_khz > clk_mgr_base->clks.dcfclk_khz)
188 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) {
189 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz;
208 pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, new_clocks->dcfclk_khz / 1000);
228 pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, new_clocks->dcfclk_khz / 1000);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn20/
amdgpu_dcn20_clk_mgr.c 199 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ?
200 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000);
202 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) {
203 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz;
205 pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, clk_mgr_base->clks.dcfclk_khz / 1000);
290 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr->clks.dcfclk_khz)) {
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn21/
amdgpu_rn_clk_mgr.c 148 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) {
149 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz;
150 rn_vbios_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz);
494 else if (a->dcfclk_khz != b->dcfclk_khz)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
amdgpu_dc_debug.c 355 CLOCK_TRACE("Current: dispclk_khz:%d max_dppclk_khz:%d dcfclk_khz:%d\n"
359 context->bw_ctx.bw.dcn.clk.dcfclk_khz,
363 CLOCK_TRACE("Calculated: dispclk_khz:%d max_dppclk_khz:%d dcfclk_khz:%d\n"
367 context->bw_ctx.bw.dcn.clk.dcfclk_khz,
amdgpu_dc.c 2694 info->engineClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dcfclk_khz;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
dc.h 280 int dcfclk_khz; member in struct:dc_clocks
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_hw_sequencer_debug.c 480 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz,
amdgpu_dcn10_hw_sequencer.c 451 DTN_INFO("\nCALCULATED Clocks: dcfclk_khz:%d dcfclk_deep_sleep_khz:%d dispclk_khz:%d\n"
453 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/
amdgpu_dcn_calcs.c 1137 context->bw_ctx.bw.dcn.clk.dcfclk_khz = (int)(v->dcfclk * 1000);
1403 dc, DM_PP_CLOCK_TYPE_DCFCLK, clocks->dcfclk_khz);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_resource.c 2788 context->bw_ctx.bw.dcn.clk.dcfclk_khz = context->bw_ctx.dml.vba.DCFCLK * 1000;

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