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      1 /*	$NetBSD: amdgpu_dcn10_init.c,v 1.2 2021/12/18 23:45:03 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2016 Advanced Micro Devices, Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: AMD
     25  *
     26  */
     27 
     28 #include <sys/cdefs.h>
     29 __KERNEL_RCSID(0, "$NetBSD: amdgpu_dcn10_init.c,v 1.2 2021/12/18 23:45:03 riastradh Exp $");
     30 
     31 #include "hw_sequencer_private.h"
     32 #include "dce110/dce110_hw_sequencer.h"
     33 #include "dcn10_hw_sequencer.h"
     34 
     35 static const struct hw_sequencer_funcs dcn10_funcs = {
     36 	.program_gamut_remap = dcn10_program_gamut_remap,
     37 	.init_hw = dcn10_init_hw,
     38 	.apply_ctx_to_hw = dce110_apply_ctx_to_hw,
     39 	.apply_ctx_for_surface = dcn10_apply_ctx_for_surface,
     40 	.update_plane_addr = dcn10_update_plane_addr,
     41 	.update_dchub = dcn10_update_dchub,
     42 	.update_pending_status = dcn10_update_pending_status,
     43 	.program_output_csc = dcn10_program_output_csc,
     44 	.enable_accelerated_mode = dce110_enable_accelerated_mode,
     45 	.enable_timing_synchronization = dcn10_enable_timing_synchronization,
     46 	.enable_per_frame_crtc_position_reset = dcn10_enable_per_frame_crtc_position_reset,
     47 	.update_info_frame = dce110_update_info_frame,
     48 	.send_immediate_sdp_message = dcn10_send_immediate_sdp_message,
     49 	.enable_stream = dce110_enable_stream,
     50 	.disable_stream = dce110_disable_stream,
     51 	.unblank_stream = dcn10_unblank_stream,
     52 	.blank_stream = dce110_blank_stream,
     53 	.enable_audio_stream = dce110_enable_audio_stream,
     54 	.disable_audio_stream = dce110_disable_audio_stream,
     55 	.disable_plane = dcn10_disable_plane,
     56 	.pipe_control_lock = dcn10_pipe_control_lock,
     57 	.prepare_bandwidth = dcn10_prepare_bandwidth,
     58 	.optimize_bandwidth = dcn10_optimize_bandwidth,
     59 	.set_drr = dcn10_set_drr,
     60 	.get_position = dcn10_get_position,
     61 	.set_static_screen_control = dcn10_set_static_screen_control,
     62 	.setup_stereo = dcn10_setup_stereo,
     63 	.set_avmute = dce110_set_avmute,
     64 	.log_hw_state = dcn10_log_hw_state,
     65 	.get_hw_state = dcn10_get_hw_state,
     66 	.clear_status_bits = dcn10_clear_status_bits,
     67 	.wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect,
     68 	.edp_power_control = dce110_edp_power_control,
     69 	.edp_wait_for_hpd_ready = dce110_edp_wait_for_hpd_ready,
     70 	.set_cursor_position = dcn10_set_cursor_position,
     71 	.set_cursor_attribute = dcn10_set_cursor_attribute,
     72 	.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,
     73 	.setup_periodic_interrupt = dcn10_setup_periodic_interrupt,
     74 	.set_clock = dcn10_set_clock,
     75 	.get_clock = dcn10_get_clock,
     76 	.get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
     77 };
     78 
     79 static const struct hwseq_private_funcs dcn10_private_funcs = {
     80 	.init_pipes = dcn10_init_pipes,
     81 	.update_plane_addr = dcn10_update_plane_addr,
     82 	.plane_atomic_disconnect = dcn10_plane_atomic_disconnect,
     83 	.program_pipe = dcn10_program_pipe,
     84 	.update_mpcc = dcn10_update_mpcc,
     85 	.set_input_transfer_func = dcn10_set_input_transfer_func,
     86 	.set_output_transfer_func = dcn10_set_output_transfer_func,
     87 	.power_down = dce110_power_down,
     88 	.enable_display_power_gating = dcn10_dummy_display_power_gating,
     89 	.blank_pixel_data = dcn10_blank_pixel_data,
     90 	.reset_hw_ctx_wrap = dcn10_reset_hw_ctx_wrap,
     91 	.enable_stream_timing = dcn10_enable_stream_timing,
     92 	.edp_backlight_control = dce110_edp_backlight_control,
     93 	.disable_stream_gating = NULL,
     94 	.enable_stream_gating = NULL,
     95 	.setup_vupdate_interrupt = dcn10_setup_vupdate_interrupt,
     96 	.did_underflow_occur = dcn10_did_underflow_occur,
     97 	.init_blank = NULL,
     98 	.disable_vga = dcn10_disable_vga,
     99 	.bios_golden_init = dcn10_bios_golden_init,
    100 	.plane_atomic_disable = dcn10_plane_atomic_disable,
    101 	.plane_atomic_power_down = dcn10_plane_atomic_power_down,
    102 	.enable_power_gating_plane = dcn10_enable_power_gating_plane,
    103 	.dpp_pg_control = dcn10_dpp_pg_control,
    104 	.hubp_pg_control = dcn10_hubp_pg_control,
    105 	.dsc_pg_control = NULL,
    106 	.get_surface_visual_confirm_color = dcn10_get_surface_visual_confirm_color,
    107 	.get_hdr_visual_confirm_color = dcn10_get_hdr_visual_confirm_color,
    108 	.set_hdr_multiplier = dcn10_set_hdr_multiplier,
    109 	.verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high,
    110 };
    111 
    112 void dcn10_hw_sequencer_construct(struct dc *dc)
    113 {
    114 	dc->hwss = dcn10_funcs;
    115 	dc->hwseq->funcs = dcn10_private_funcs;
    116 }
    117