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    Searched refs:dd_csr (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/arch/next68k/stand/boot/
en.c 208 DPRINTF(("en_put: txdma->dd_csr = %x\n",txdma->dd_csr));
223 txdma->dd_csr = (turbo ? DMACSR_INITBUFTURBO : DMACSR_INITBUF) |
225 txdma->dd_csr = 0;
230 txdma->dd_csr = DMACSR_SETENABLE;
241 state = txdma->dd_csr &
249 txdma->dd_csr = DMACSR_RESET | DMACSR_CLRCOMPLETE;
292 DPRINTF(("en_get: rxdma->dd_csr = %x\n",rxdma->dd_csr));
301 rxdma->dd_csr = 0
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scsi.c 79 dma->dd_csr = DMACSR_RESET;
372 dma->dd_csr = DMACSR_READ | DMACSR_RESET;
375 dma->dd_csr = DMACSR_READ | DMACSR_SETENABLE;
377 dma->dd_csr = 0;
378 dma->dd_csr = DMACSR_INITBUF | DMACSR_READ | DMACSR_RESET;
381 dma->dd_csr = DMACSR_READ | DMACSR_SETENABLE;
401 state = dma->dd_csr & (DMACSR_BUSEXC | DMACSR_COMPLETE
422 state = dma->dd_csr & (DMACSR_BUSEXC | DMACSR_COMPLETE
429 dma->dd_csr = DMACSR_CLRCOMPLETE | DMACSR_RESET;
dmareg.h 58 volatile uint32_t dd_csr; /* control & status register */ member in struct:dma_dev
73 * bits in dd_csr
  /src/sys/arch/next68k/dev/
nextdmareg.h 58 int dd_csr; /* control & status register */
73 #define DD_CSR 0
74 #define DD_SAVED_NEXT (DD_CSR + sizeof(int) + 0x3fec)
86 * bits in dd_csr
nextdma.c 285 nd_bsw4(DD_CSR, DMACSR_RESET | DMACSR_CLRCOMPLETE);
286 nd_bsw4(DD_CSR, 0);
296 state = nd_bsr4 (DD_CSR);
331 nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | DMACSR_RESET);
584 state = nd_bsr4(DD_CSR);
728 printf("CLNDMAP: dd->dd_csr = %s\n", sbuf);
745 nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | dmadir);
748 nd_bsw4(DD_CSR,
754 nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | DMACSR_RESET);
876 nd_bsw4(DD_CSR, (turbo
899 u_long dd_csr; local in function:nextdma_print
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