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    Searched refs:dev_dbg (Results 1 - 18 of 18) sorted by relevancy

  /src/sys/external/bsd/dwc2/dist/
dwc2_coreintr.c 133 dev_dbg(hsotg->dev, "++OTG Interrupt gotgint=%0x [%s]\n", gotgint,
137 dev_dbg(hsotg->dev,
153 dev_dbg(hsotg->dev, "Session End Detected\n");
172 dev_dbg(hsotg->dev,
233 dev_dbg(hsotg->dev, "HNP Failed\n");
246 dev_dbg(hsotg->dev,
250 dev_dbg(hsotg->dev, "a_suspend->a_peripheral (%d)\n",
269 dev_dbg(hsotg->dev,
272 dev_dbg(hsotg->dev, " ++OTG Interrupt: Debounce Done++\n");
300 dev_dbg(hsotg->dev, " ++Connector ID Status Change Interrupt++ (%s)\n"
    [all...]
dwc2_hcd.c 99 dev_dbg(hsotg->dev, " Assigned to channel %p:\n", chan);
100 dev_dbg(hsotg->dev, " hcchar 0x%08x, hcsplt 0x%08x\n",
102 dev_dbg(hsotg->dev, " hctsiz 0x%08x, hc_dma 0x%08x\n",
104 dev_dbg(hsotg->dev, " dev_addr: %d, ep_num: %d, ep_is_in: %d\n",
106 dev_dbg(hsotg->dev, " ep_type: %d\n", chan->ep_type);
107 dev_dbg(hsotg->dev, " max_packet: %d\n", chan->max_packet);
108 dev_dbg(hsotg->dev, " data_pid_start: %d\n", chan->data_pid_start);
109 dev_dbg(hsotg->dev, " xfer_started: %d\n", chan->xfer_started);
110 dev_dbg(hsotg->dev, " halt_status: %d\n", chan->halt_status);
111 dev_dbg(hsotg->dev, " xfer_buf: %p\n", chan->xfer_buf)
    [all...]
dwc2_core.c 82 dev_dbg(hsotg->dev, "%s\n", __func__);
110 dev_dbg(hsotg->dev, "%s\n", __func__);
155 dev_dbg(hsotg->dev, "%s\n", __func__);
208 dev_dbg(hsotg->dev, "%s\n", __func__);
294 dev_dbg(hsotg->dev, "%s\n", __func__);
483 dev_dbg(hsotg->dev, "Initializing HCFG.FSLSPClkSel to %08x\n", val);
562 dev_dbg(hsotg->dev, "Forcing mode to %s\n", host ? "host" : "device");
667 dev_dbg(hsotg->dev, "FS PHY selected\n");
694 dev_dbg(hsotg->dev, "FS PHY enabling I2C\n");
732 dev_dbg(hsotg->dev, "HS ULPI PHY selected\n")
    [all...]
dwc2_hcdintr.c 701 dev_dbg(hsotg->dev, "## QTD list empty ##\n");
1158 dev_dbg(hsotg->dev, "--Host Channel %d Interrupt: STALL Received--\n",
1259 dev_dbg(hsotg->dev, "%s: qtd is NULL\n", __func__);
1264 dev_dbg(hsotg->dev, "%s: qtd->urb is NULL\n", __func__);
1536 dev_dbg(hsotg->dev, "--Host Channel %d Interrupt: Babble Error--\n",
1572 dev_dbg(hsotg->dev, "--Host Channel %d Interrupt: AHB Error--\n",
1672 dev_dbg(hsotg->dev,
1734 dev_dbg(hsotg->dev, "--Host Channel %d Interrupt: Frame Overrun--\n",
1764 dev_dbg(hsotg->dev,
1804 dev_dbg(hsotg->dev
    [all...]
dwc2_hcdqueue.c 150 dev_dbg(hsotg->dev, "interval=%d\n", qh->interval);
306 dev_dbg(hsotg->dev,
544 dev_dbg(hsotg->dev,
552 dev_dbg(hsotg->dev,
677 dev_dbg(hsotg->dev,
  /src/sys/external/bsd/drm2/dist/drm/amd/amdkfd/
kfd_flat_memory.c 440 dev_dbg(kfd_device, "node id %u\n", id);
441 dev_dbg(kfd_device, "gpu id %u\n", pdd->dev->id);
442 dev_dbg(kfd_device, "lds_base %llX\n", pdd->lds_base);
443 dev_dbg(kfd_device, "lds_limit %llX\n", pdd->lds_limit);
444 dev_dbg(kfd_device, "gpuvm_base %llX\n", pdd->gpuvm_base);
445 dev_dbg(kfd_device, "gpuvm_limit %llX\n", pdd->gpuvm_limit);
446 dev_dbg(kfd_device, "scratch_base %llX\n", pdd->scratch_base);
447 dev_dbg(kfd_device, "scratch_limit %llX\n", pdd->scratch_limit);
kfd_chardev.c 142 dev_dbg(kfd_device, "process %d opened, compat mode (32 bit) - %d\n",
879 dev_dbg(kfd_device, "get apertures for PASID 0x%x", p->pasid);
900 dev_dbg(kfd_device,
902 dev_dbg(kfd_device,
904 dev_dbg(kfd_device,
906 dev_dbg(kfd_device,
908 dev_dbg(kfd_device,
910 dev_dbg(kfd_device,
912 dev_dbg(kfd_device,
914 dev_dbg(kfd_device
    [all...]
kfd_events.c 849 dev_dbg(kfd_device,
  /src/sys/external/bsd/drm2/include/linux/
device.h 80 #define dev_dbg(DEV, FMT, ...) do { \ macro
  /src/sys/external/bsd/dwc2/
dwc2.h 87 #define dev_dbg(d,fmt,...) do { \ macro
103 #define dev_dbg(...) do { } while (0) macro
dwc2.c 1400 dev_dbg(hsotg->dev, "## %s: qtd is NULL ##\n", __func__);
1405 dev_dbg(hsotg->dev, "## %s: qtd->urb is NULL ##\n", __func__);
1411 dev_dbg(hsotg->dev, "## %s: urb->priv is NULL ##\n", __func__);
1510 dev_dbg(hsotg->dev, "DWC OTG HCD START\n");
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_irq.c 259 dev_dbg(adev->dev, "amdgpu: using MSI/MSI-X.\n");
276 dev_dbg(adev->dev, "amdgpu: using MSI/MSI-X.\n");
amdgpu_gem.c 603 dev_dbg(pci_dev_dev(dev->pdev),
611 dev_dbg(pci_dev_dev(dev->pdev),
621 dev_dbg(pci_dev_dev(dev->pdev), "invalid flags combination 0x%08X\n",
633 dev_dbg(pci_dev_dev(dev->pdev), "unsupported operation %d\n",
amdgpu_xgmi.c 305 dev_dbg(adev->dev, "Set xgmi pstate %d.\n", pstate);
amdgpu_kms.c 191 dev_dbg(pci_dev_dev(dev->pdev),
  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/device/
nouveau_nvkm_engine_device_tegra.c 335 dev_dbg(&pdev->dev, "GPU clock set to %lu\n", rate);
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_kms.c 161 dev_dbg(dev->dev,
  /src/sys/external/bsd/drm2/dist/drm/ttm/
ttm_page_alloc_dma.c 1209 dev_dbg(p->dev, "(%s:%d) Freeing.\n", p->pool->name,

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