| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn10/ |
| amdgpu_rv1_clk_mgr.c | 49 bool request_dpp_div = new_clocks->dispclk_khz > new_clocks->dppclk_khz;
50 bool dispclk_increase = new_clocks->dispclk_khz > clk_mgr->base.clks.dispclk_khz;
52 bool cur_dpp_div = clk_mgr->base.clks.dispclk_khz > clk_mgr->base.clks.dppclk_khz;
58 return new_clocks->dispclk_khz;
63 if (new_clocks->dispclk_khz <= disp_clk_threshold)
64 return new_clocks->dispclk_khz;
68 return new_clocks->dispclk_khz;
77 return new_clocks->dispclk_khz;
82 if (clk_mgr->base.clks.dispclk_khz <= disp_clk_threshold
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce120/ |
| amdgpu_dce120_clk_mgr.c | 96 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz;
102 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) {
112 clk_mgr_base->clks.dispclk_khz = dce112_set_clock(clk_mgr_base, patched_disp_clk);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn20/ |
| amdgpu_dcn20_clk_mgr.c | 137 * clk_mgr->base.dentist_vco_freq_khz / clk_mgr->base.clks.dispclk_khz;
170 if (clk_mgr_base->clks.dispclk_khz == 0 ||
245 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) {
246 clk_mgr_base->clks.dispclk_khz = new_clocks->dispclk_khz;
248 pp_smu->set_voltage_by_freq(&pp_smu->pp_smu, PP_SMU_NV_DISPCLK, clk_mgr_base->clks.dispclk_khz / 1000);
272 clk_mgr_base->clks.dispclk_khz / 1000 / 7);
315 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr->clks.dispclk_khz)) {
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce110/ |
| amdgpu_dce110_clk_mgr.c | 235 pp_display_cfg->disp_clk_khz = dc->clk_mgr->clks.dispclk_khz;
259 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz;
273 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) {
274 context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr_base, patched_disp_clk);
275 clk_mgr_base->clks.dispclk_khz = patched_disp_clk;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| dce_clk_mgr.c | 232 if (context->bw_ctx.bw.dce.dispclk_khz >
242 < context->bw_ctx.bw.dce.dispclk_khz)
655 pp_display_cfg->disp_clk_khz = dc->res_pool->clk_mgr->clks.dispclk_khz;
679 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz;
693 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) {
695 clk_mgr->clks.dispclk_khz = patched_disp_clk;
706 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz;
720 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) {
721 context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr, patched_disp_clk);
722 clk_mgr->clks.dispclk_khz = patched_disp_clk
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce100/ |
| amdgpu_dce_clk_mgr.c | 213 if (context->bw_ctx.bw.dce.dispclk_khz >
223 < context->bw_ctx.bw.dce.dispclk_khz)
406 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz;
420 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) {
422 clk_mgr_base->clks.dispclk_khz = patched_disp_clk;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce112/ |
| amdgpu_dce112_clk_mgr.c | 204 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz;
218 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) {
220 clk_mgr_base->clks.dispclk_khz = patched_disp_clk;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn21/ |
| amdgpu_rn_clk_mgr.c | 172 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) {
173 clk_mgr_base->clks.dispclk_khz = new_clocks->dispclk_khz;
174 rn_vbios_smu_set_dispclk(clk_mgr, clk_mgr_base->clks.dispclk_khz);
196 clk_mgr_base->clks.dispclk_khz / 1000 / 7);
490 if (a->dispclk_khz != b->dispclk_khz)
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
| amdgpu_dc_debug.c | 355 CLOCK_TRACE("Current: dispclk_khz:%d max_dppclk_khz:%d dcfclk_khz:%d\n"
357 context->bw_ctx.bw.dcn.clk.dispclk_khz,
363 CLOCK_TRACE("Calculated: dispclk_khz:%d max_dppclk_khz:%d dcfclk_khz:%d\n"
365 context->bw_ctx.bw.dcn.clk.dispclk_khz,
|
| amdgpu_dc.c | 2693 info->displayClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dispclk_khz;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
| core_types.h | 329 int dispclk_khz; member in struct:dce_bw_output
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/ |
| amdgpu_dcn_calcs.c | 1139 context->bw_ctx.bw.dcn.clk.dispclk_khz = (int)(v->dispclk * 1000);
1141 context->bw_ctx.bw.dcn.clk.dispclk_khz = (int)(dc->dcn_soc->max_dispclk_vmax0p9 * 1000);
1143 if (context->bw_ctx.bw.dcn.clk.dispclk_khz <
1145 context->bw_ctx.bw.dcn.clk.dispclk_khz =
1149 context->bw_ctx.bw.dcn.clk.dppclk_khz = context->bw_ctx.bw.dcn.clk.dispclk_khz /
1390 dc, DM_PP_CLOCK_TYPE_DISPLAY_CLK, clocks->dispclk_khz);
|
| amdgpu_dce_calcs.c | 2753 if (calcs_output->dispclk_khz > int_max_clk)
3070 calcs_output->dispclk_khz =
3595 calcs_output->dispclk_khz = 0;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce100/ |
| amdgpu_dce100_resource.c | 831 context->bw_ctx.bw.dce.dispclk_khz = 681000;
834 context->bw_ctx.bw.dce.dispclk_khz = 0;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
| dc.h | 278 int dispclk_khz; member in struct:dc_clocks
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_hw_sequencer_debug.c | 482 dc->current_state->bw_ctx.bw.dcn.clk.dispclk_khz,
|
| amdgpu_dcn10_hw_sequencer.c | 451 DTN_INFO("\nCALCULATED Clocks: dcfclk_khz:%d dcfclk_deep_sleep_khz:%d dispclk_khz:%d\n"
455 dc->current_state->bw_ctx.bw.dcn.clk.dispclk_khz,
2251 dc->clk_mgr->clks.dispclk_khz / 2;
2265 dc->clk_mgr->clks.dispclk_khz / 2 :
2266 dc->clk_mgr->clks.dispclk_khz;
3294 current_clocks->dispclk_khz = clk_khz;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce80/ |
| amdgpu_dce80_resource.c | 865 context->bw_ctx.bw.dce.dispclk_khz = 681000;
868 context->bw_ctx.bw.dce.dispclk_khz = 0;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| amdgpu_dce110_resource.c | 1006 context->bw_ctx.bw.dce.dispclk_khz,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce112/ |
| amdgpu_dce112_resource.c | 925 context->bw_ctx.bw.dce.dispclk_khz,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_resource.c | 2787 context->bw_ctx.bw.dcn.clk.dispclk_khz = context->bw_ctx.dml.vba.DISPCLK * 1000;
2852 context->bw_ctx.bw.dcn.clk.bw_dispclk_khz = context->bw_ctx.bw.dcn.clk.dispclk_khz;
|
