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    Searched refs:display_clk_khz (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce120/
amdgpu_dce120_clk_mgr.c 42 { .display_clk_khz = 0, .pixel_clk_khz = 0 },
44 { .display_clk_khz = 0, .pixel_clk_khz = 0 },
46 { .display_clk_khz = 460000, .pixel_clk_khz = 400000 },
48 { .display_clk_khz = 670000, .pixel_clk_khz = 600000 },
50 { .display_clk_khz = 1133000, .pixel_clk_khz = 600000 } };
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce100/
amdgpu_dce_clk_mgr.c 74 { .display_clk_khz = 0, .pixel_clk_khz = 0 },
76 { .display_clk_khz = 0, .pixel_clk_khz = 0 },
78 { .display_clk_khz = 352000, .pixel_clk_khz = 330000},
80 { .display_clk_khz = 600000, .pixel_clk_khz = 400000 },
82 { .display_clk_khz = 600000, .pixel_clk_khz = 400000 } };
214 clk_mgr_dce->max_clks_by_state[i].display_clk_khz
222 if (clk_mgr_dce->max_clks_by_state[clk_mgr_dce->max_clks_state].display_clk_khz
321 clk_mgr_dce->max_clks_by_state[clk_state].display_clk_khz =
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_clk_mgr.c 58 { .display_clk_khz = 0, .pixel_clk_khz = 0 },
60 { .display_clk_khz = 0, .pixel_clk_khz = 0 },
62 { .display_clk_khz = 352000, .pixel_clk_khz = 330000},
64 { .display_clk_khz = 600000, .pixel_clk_khz = 400000 },
66 { .display_clk_khz = 600000, .pixel_clk_khz = 400000 } };
70 { .display_clk_khz = 0, .pixel_clk_khz = 0 },
72 { .display_clk_khz = 352000, .pixel_clk_khz = 330000 },
74 { .display_clk_khz = 352000, .pixel_clk_khz = 330000 },
76 { .display_clk_khz = 467000, .pixel_clk_khz = 400000 },
78 { .display_clk_khz = 643000, .pixel_clk_khz = 400000 } }
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce110/
amdgpu_dce110_clk_mgr.c 61 { .display_clk_khz = 0, .pixel_clk_khz = 0 },
63 { .display_clk_khz = 352000, .pixel_clk_khz = 330000 },
65 { .display_clk_khz = 352000, .pixel_clk_khz = 330000 },
67 { .display_clk_khz = 467000, .pixel_clk_khz = 400000 },
69 { .display_clk_khz = 643000, .pixel_clk_khz = 400000 } };
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce112/
amdgpu_dce112_clk_mgr.c 63 { .display_clk_khz = 0, .pixel_clk_khz = 0 },
65 { .display_clk_khz = 389189, .pixel_clk_khz = 346672 },
67 { .display_clk_khz = 459000, .pixel_clk_khz = 400000 },
69 { .display_clk_khz = 667000, .pixel_clk_khz = 600000 },
71 { .display_clk_khz = 1132000, .pixel_clk_khz = 600000 } };
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
clk_mgr_internal.h 193 int display_clk_khz; member in struct:state_dependent_clocks

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