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  /src/sys/arch/arm/amlogic/
meson_clk_div.c 43 struct meson_clk_div *div = &clk->u.div; local
60 val = CLK_READ(sc, div->reg);
63 if (div->div)
64 ratio = __SHIFTOUT(val, div->div);
68 if (div->flags & MESON_CLK_DIV_POWER_OF_TWO) {
70 } else if (div->flags & MESON_CLK_DIV_CPU_SCALE_TABLE) {
83 struct meson_clk_div *div = &clk->u.div local
143 struct meson_clk_div *div = &clk->u.div; local
    [all...]
meson_clk_mpll.c 71 const uint64_t div = (SDM_DEN * n2) + sdm; local
72 if (div == 0)
75 return (u_int)howmany(parent_rate * SDM_DEN, div);
  /src/sys/arch/arm/sunxi/
sunxi_ccu_div.c 43 struct sunxi_ccu_div *div = &clk->u.div; local
48 if (!div->enable)
51 val = CCU_READ(sc, div->reg);
53 val |= div->enable;
55 val &= ~div->enable;
56 CCU_WRITE(sc, div->reg, val);
65 struct sunxi_ccu_div *div = &clk->u.div; local
81 val = CCU_READ(sc, div->reg)
105 struct sunxi_ccu_div *div = &clk->u.div; local
137 struct sunxi_ccu_div *div = &clk->u.div; local
187 struct sunxi_ccu_div *div = &clk->u.div; local
216 struct sunxi_ccu_div *div = &clk->u.div; local
    [all...]
sunxi_ccu_prediv.c 45 u_int rate, pre, div, sel; local
64 if (prediv->div)
65 div = __SHIFTOUT(val, prediv->div);
67 div = 0;
71 div = 1 << div;
73 div++;
84 return rate / pre / div;
86 return rate / div;
    [all...]
sun4i_a10_ccu.c 217 0, /* div */
242 0, /* div */
248 __BITS(1,0), /* div */
254 __BITS(5,4), /* div */
260 __BITS(9,8), /* div */
390 __BITS(3,0), /* div */
397 __BITS(3,0), /* div */
404 __BITS(3,0), /* div */
411 __BITS(3,0), /* div */
419 .u.div.reg = LCD0CH0_CFG_REG
    [all...]
  /src/lib/libc/arch/x86_64/stdlib/
div.S 1 /* $NetBSD: div.S,v 1.2 2014/05/22 15:01:56 uebayasi Exp $ */
10 RCSID("$NetBSD: div.S,v 1.2 2014/05/22 15:01:56 uebayasi Exp $")
13 ENTRY(div) function
20 END(div)
  /src/lib/libc/stdlib/
Lint_div.c 12 div(int num, int denom) function
div.c 1 /* $NetBSD: div.c,v 1.8 2012/06/25 22:32:45 abs Exp $ */
38 static char sccsid[] = "@(#)div.c 8.1 (Berkeley) 6/4/93";
40 __RCSID("$NetBSD: div.c,v 1.8 2012/06/25 22:32:45 abs Exp $");
47 div(int num, int denom) function
  /src/sys/arch/arm/nxp/
imx_ccm_div.c 45 struct imx_ccm_div *div = &clk->u.div; local
59 const uint32_t val = CCM_READ(sc, clk->regidx, div->reg);
60 const u_int n = __SHIFTOUT(val, div->mask);
69 struct imx_ccm_div *div = &clk->u.div; local
82 if ((div->flags & IMX_DIV_SET_RATE_PARENT) != 0)
89 for (n = 0; n < __SHIFTOUT_MASK(div->mask); n++) {
92 if ((div->flags & IMX_DIV_ROUND_DOWN) != 0) {
107 val = CCM_READ(sc, clk->regidx, div->reg)
119 struct imx_ccm_div *div = &clk->u.div; local
    [all...]
imx6_ccm.c 168 uint32_t div = __SHIFTOUT(v, pll->mask); local
170 return freq * ((div == 1) ? 22 : 20);
183 uint32_t div = __SHIFTOUT(v, pll->mask); local
185 return freq * div / 2;
201 uint32_t div = __SHIFTOUT(v, pll->mask); local
209 return freq * div + tmp;
236 return rate_parent * fixed_factor->mult / fixed_factor->div;
271 struct imx6_clk_div *div = &iclk->clk.div; local
282 if (div->base == IMX6_CLK_REG_CCM_ANALOG
416 struct imx6_clk_div *div = &iclk->clk.div; local
    [all...]
  /src/tests/crypto/libcrypto/bn/
Makefile 5 SUBDIR=bn div exp
  /src/lib/libc/arch/alpha/
Makefile.inc 13 ${TOOL_M4} -DNAME=__divqu -DOP=div -DS=false -DWORDSIZE=64 \
17 ${TOOL_M4} -DNAME=__divq -DOP=div -DS=true -DWORDSIZE=64 \
21 ${TOOL_M4} -DNAME=__divlu -DOP=div -DS=false -DWORDSIZE=32 \
25 ${TOOL_M4} -DNAME=__divl -DOP=div -DS=true -DWORDSIZE=32 \
  /src/lib/libc/arch/i386/stdlib/
div.S 1 /* $NetBSD: div.S,v 1.10 2014/05/23 02:34:19 uebayasi Exp $ */
10 RCSID("$NetBSD: div.S,v 1.10 2014/05/23 02:34:19 uebayasi Exp $")
13 ENTRY(div) function
25 END(div)
  /src/sys/arch/hpcarm/dev/
ipaq_lcdreg.h 69 #define CR3_PCD(div) (((div) - 4)/2) /* PCD ; Pixel clock divisor */
70 #define CR3_ACB(div) (((div) - 2)/2) /* ACB ; */
71 #define CR3_API(div) ((div) << 16) /* API ; AC Bias */
  /src/sys/compat/linux/common/
linux_statfs.h 98 int i, div; local
113 div = bsp->f_frsize ? (bsp->f_bsize / bsp->f_frsize) : 1;
114 if (div == 0)
115 div = 1;
118 lsp->l_fblocks = bsp->f_blocks / div;
119 lsp->l_fbfree = bsp->f_bfree / div;
120 lsp->l_fbavail = bsp->f_bavail / div;
122 lsp->l_fffree = bsp->f_ffree / div;
  /src/sys/external/bsd/drm2/dist/drm/nouveau/
nouveau_led.c 47 u32 div, duty; local
49 div = nvif_rd32(device, 0x61c880) & 0x00ffffff;
52 if (div > 0)
53 return duty * LED_FULL / div;
67 u32 div, duty; local
69 div = input_clk / freq;
70 duty = value * div / LED_FULL;
77 nvif_wr32(device, 0x61c880, div);
nouveau_backlight.c 127 u32 div = 1025; local
132 return ((val * 100) + (div / 2)) / div;
142 u32 div = 1025; local
143 u32 val = (bd->props.brightness * div) / 100;
163 u32 div, val; local
165 div = nvif_rd32(device, NV50_PDISP_SOR_PWM_DIV(or));
168 if (div && div >= val)
169 return ((val * 100) + (div / 2)) / div
181 u32 div, val; local
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_afmt.c 59 unsigned long div, mul; local
66 div = gcd(n, cts);
68 n /= div;
69 cts /= div;
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/stingray/
stingray-clock.dtsi 45 clock-div = <2>;
131 clock-div = <1>;
139 clock-div = <2>;
148 clock-div = <4>;
156 clock-div = <1>;
164 clock-div = <2>;
172 clock-div = <1>;
180 clock-div = <1>;
  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/volt/
nouveau_nvkm_subdev_volt_gk104.c 48 u32 div, duty; local
50 div = nvkm_rd32(device, 0x20340);
53 return bios->base + bios->pwm_range * duty / div;
61 u32 div, duty; local
64 div = 27648000 / bios->pwm_freq;
65 duty = DIV_ROUND_UP((uv - bios->base) * div, bios->pwm_range);
67 nvkm_wr32(device, 0x20340, div);
  /src/lib/libarch/sparc/v8/
sparc_v8.S 2 * GCC generated output for sparc v8 mul/div/rem operations.
63 /*--- .div ---*/
65 .global .div
66 .type .div,@function
67 .div:
74 .size .div,.LLfe4-.div
  /src/sys/arch/arm/rockchip/
rk_cru_composite.c 86 u_int div; local
89 div = 1U << __SHIFTOUT(val, composite->div_mask);
91 div = __SHIFTOUT(val, composite->div_mask) * 2 + 3;
92 return ((uint64_t)prate * 2 + div - 1) / div;
94 div = (composite->div_mask != 0)
97 return prate / div;
183 for (u_int div = 1; div <= __SHIFTOUT_MASK(composite->div_mask) + 1; div++)
    [all...]
  /src/sys/arch/arm/nvidia/
tegra_clock.h 46 u_int div; member in struct:tegra_fixed_div_clk
85 struct tegra_div_clk div; member in union:tegra_clk::__anon1099
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/broadcom/
bcm-cygnus-clock.dtsi 57 clock-div = <2>;
66 clock-div = <4>;
84 clock-div = <2>;
93 clock-div = <4>;
  /src/sys/arch/arm/imx/
imxpwm.c 94 const int div = __SHIFTOUT(cr, PWM_CR_PRESCALER) + 1; local
96 const uint64_t rate = sc->sc_freq / div;
117 int div = 0; local
119 div++;
120 rate = sc->sc_freq / div;
127 cr |= __SHIFTIN(div - 1, PWM_CR_PRESCALER);

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