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    Searched refs:dml_pow (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/
amdgpu_display_rq_dlg_calc_21.c 968 (unsigned int) (ref_freq_to_pix_freq * dml_pow(2, 19));
970 * dml_pow(2, 8));
974 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int)dml_pow(2, 13));
983 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2));
984 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18));
1380 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13));
1381 ASSERT(refcyc_per_req_delivery_l < dml_pow(2, 13));
1416 ASSERT(refcyc_per_req_delivery_pre_c < dml_pow(2, 13));
1417 ASSERT(refcyc_per_req_delivery_c < dml_pow(2, 13));
1480 ASSERT(disp_dlg_regs->refcyc_x_after_scaler < (unsigned int)dml_pow(2, 13))
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/
amdgpu_display_rq_dlg_calc_20.c 922 (unsigned int) (ref_freq_to_pix_freq * dml_pow(2, 19));
924 * dml_pow(2, 8));
928 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int) dml_pow(2, 13));
937 disp_dlg_regs->min_dst_y_next_start = (unsigned int) ((double) dlg_vblank_start * dml_pow(2, 2));
938 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18));
1316 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13));
1317 ASSERT(refcyc_per_req_delivery_l < dml_pow(2, 13));
1348 ASSERT(refcyc_per_req_delivery_pre_c < dml_pow(2, 13));
1349 ASSERT(refcyc_per_req_delivery_c < dml_pow(2, 13));
1407 ASSERT(disp_dlg_regs->refcyc_x_after_scaler < (unsigned int) dml_pow(2, 13))
    [all...]
amdgpu_display_rq_dlg_calc_20v2.c 922 (unsigned int) (ref_freq_to_pix_freq * dml_pow(2, 19));
924 * dml_pow(2, 8));
928 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int) dml_pow(2, 13));
938 + min_dst_y_ttu_vblank) * dml_pow(2, 2));
939 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18));
1317 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13));
1318 ASSERT(refcyc_per_req_delivery_l < dml_pow(2, 13));
1349 ASSERT(refcyc_per_req_delivery_pre_c < dml_pow(2, 13));
1350 ASSERT(refcyc_per_req_delivery_c < dml_pow(2, 13));
1408 ASSERT(disp_dlg_regs->refcyc_x_after_scaler < (unsigned int) dml_pow(2, 13))
    [all...]
amdgpu_display_mode_vba_20.c 294 / dml_pow(
3473 dml_pow((locals->ReturnBWToDCNPerState * locals->UrgentLatency
3496 dml_pow((locals->ReturnBWToDCNPerState * locals->UrgentLatency
amdgpu_display_mode_vba_20v2.c 318 / dml_pow(
3510 dml_pow((locals->ReturnBWToDCNPerState * locals->UrgentLatency
3533 dml_pow((locals->ReturnBWToDCNPerState * locals->UrgentLatency
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/
amdgpu_dml1_display_rq_dlg_calc.c 1141 (unsigned int) (ref_freq_to_pix_freq * dml_pow(2, 19));
1143 * dml_pow(2, 8));
1146 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int) dml_pow(2, 13));
1163 + min_dst_y_ttu_vblank) * dml_pow(2, 2));
1164 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18));
1432 ASSERT(disp_dlg_regs->refcyc_x_after_scaler < (unsigned int) dml_pow(2, 13));
1442 disp_dlg_regs->dst_y_prefetch = (unsigned int) (dst_y_prefetch * dml_pow(2, 2));
1453 disp_dlg_regs->dst_y_per_vm_vblank = (unsigned int) (dst_y_per_vm_vblank * dml_pow(2, 2));
1457 disp_dlg_regs->dst_y_per_row_vblank = (unsigned int) (dst_y_per_row_vblank * dml_pow(2, 2));
1511 disp_dlg_regs->vratio_prefetch = (unsigned int) dml_pow(2, 21) - 1
    [all...]
dml_inline_defs.h 85 static inline double dml_pow(double a, int exp) function in typeref:typename:double

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