/src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/src/ |
dmub_dcn21.h | 39 bool dmub_dcn21_is_auto_load_done(struct dmub_srv *dmub); 41 bool dmub_dcn21_is_phy_init(struct dmub_srv *dmub);
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Makefile | 23 DMUB = dmub_srv.o dmub_reg.o dmub_dcn20.o dmub_dcn21.o
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amdgpu_dmub_dcn21.c | 31 #include "../inc/dmub_srv.h" 61 bool dmub_dcn21_is_auto_load_done(struct dmub_srv *dmub) 66 bool dmub_dcn21_is_phy_init(struct dmub_srv *dmub)
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dmub_dcn20.h | 33 struct dmub_srv; 160 void dmub_dcn20_init(struct dmub_srv *dmub); 162 void dmub_dcn20_reset(struct dmub_srv *dmub); 164 void dmub_dcn20_reset_release(struct dmub_srv *dmub); 166 void dmub_dcn20_backdoor_load(struct dmub_srv *dmub, 170 void dmub_dcn20_setup_windows(struct dmub_srv *dmub, 177 void dmub_dcn20_setup_mailbox(struct dmub_srv *dmub, 180 uint32_t dmub_dcn20_get_inbox1_rptr(struct dmub_srv *dmub); 182 void dmub_dcn20_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset); 184 bool dmub_dcn20_is_hw_init(struct dmub_srv *dmub) [all...] |
amdgpu_dmub_dcn20.c | 31 #include "../inc/dmub_srv.h" 62 static void dmub_dcn20_get_fb_base_offset(struct dmub_srv *dmub, 83 void dmub_dcn20_reset(struct dmub_srv *dmub) 92 void dmub_dcn20_reset_release(struct dmub_srv *dmub) 100 void dmub_dcn20_backdoor_load(struct dmub_srv *dmub, 135 void dmub_dcn20_setup_windows(struct dmub_srv *dmub, 193 void dmub_dcn20_setup_mailbox(struct dmub_srv *dmub, 202 uint32_t dmub_dcn20_get_inbox1_rptr(struct dmub_srv *dmub) 207 void dmub_dcn20_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset) 212 bool dmub_dcn20_is_hw_init(struct dmub_srv *dmub [all...] |
amdgpu_dmub_reg.c | 32 #include "../inc/dmub_srv.h" 77 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1, 94 void dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n, 109 void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift,
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dmub_reg.h | 33 struct dmub_srv; 117 void dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n, 120 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1, 123 void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift,
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amdgpu_dmub_srv.c | 31 #include "../inc/dmub_srv.h" 116 static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic) 150 enum dmub_status dmub_srv_create(struct dmub_srv *dmub, 199 void dmub_srv_destroy(struct dmub_srv *dmub) 205 dmub_srv_calc_region_info(struct dmub_srv *dmub, 266 enum dmub_status dmub_srv_calc_fb_info(struct dmub_srv *dmub, 299 enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub, 313 enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init) 329 enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, 426 enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/inc/ |
dmub_srv.h | 1 /* $NetBSD: dmub_srv.h,v 1.2 2021/12/18 23:45:06 riastradh Exp $ */ 78 struct dmub_srv; 236 void (*init)(struct dmub_srv *dmub); 238 void (*reset)(struct dmub_srv *dmub); 240 void (*reset_release)(struct dmub_srv *dmub); 242 void (*backdoor_load)(struct dmub_srv *dmub, 246 void (*setup_windows)(struct dmub_srv *dmub, 253 void (*setup_mailbox)(struct dmub_srv *dmub, 256 uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub); 258 void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset) 308 struct dmub_srv { struct [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
amdgpu_dc_dmub_srv.c | 33 #include "../dmub/inc/dmub_srv.h" 36 struct dmub_srv *dmub) 42 struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub) 57 void dc_dmub_srv_destroy(struct dc_dmub_srv **dmub_srv) 59 if (*dmub_srv) { 60 kfree(*dmub_srv); 61 *dmub_srv = NULL; 68 struct dmub_srv *dmub = dc_dmub_srv->dmub; 94 struct dmub_srv *dmub = dc_dmub_srv->dmub; 105 struct dmub_srv *dmub = dc_dmub_srv->dmub [all...] |
dc_dmub_srv.h | 34 struct dmub_srv; 46 struct dmub_srv *dmub;
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amdgpu_dc_helper.c | 56 gather = ctx->dmub_srv->reg_helper_offload.gather_in_progress; 57 ctx->dmub_srv->reg_helper_offload.gather_in_progress = false; 59 dc_dmub_srv_cmd_queue(ctx->dmub_srv, &cmd_buf->header); 61 ctx->dmub_srv->reg_helper_offload.gather_in_progress = gather; 79 gather = ctx->dmub_srv->reg_helper_offload.gather_in_progress; 80 ctx->dmub_srv->reg_helper_offload.gather_in_progress = false; 82 dc_dmub_srv_cmd_queue(ctx->dmub_srv, &cmd_buf->header); 84 ctx->dmub_srv->reg_helper_offload.gather_in_progress = gather; 98 gather = ctx->dmub_srv->reg_helper_offload.gather_in_progress; 99 ctx->dmub_srv->reg_helper_offload.gather_in_progress = false [all...] |
dm_services.h | 45 struct dmub_srv; 147 struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub); 148 void dc_dmub_srv_destroy(struct dc_dmub_srv **dmub_srv);
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dc_types.h | 119 struct dc_dmub_srv *dmub_srv; member in struct:dc_context
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
dmub_psr.c | 34 #include "../../dmub/inc/dmub_srv.h" 67 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd.psr_enable.header); 68 dc_dmub_srv_cmd_execute(dc->dmub_srv); 69 dc_dmub_srv_wait_idle(dc->dmub_srv); 91 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd.psr_set_level.header); 92 dc_dmub_srv_cmd_execute(dc->dmub_srv); 93 dc_dmub_srv_wait_idle(dc->dmub_srv); 178 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd.psr_copy_settings.header); 179 dc_dmub_srv_cmd_execute(dc->dmub_srv); 180 dc_dmub_srv_wait_idle(dc->dmub_srv); [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
amdgpu_dm.h | 63 struct dmub_srv; 129 * @dmub_srv: 132 * that supports it. The pointer to the dmub_srv will be 135 struct dmub_srv *dmub_srv; member in struct:amdgpu_display_manager
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amdgpu_dm.c | 38 #include "dmub/inc/dmub_srv.h" 766 struct dmub_srv *dmub_srv = adev->dm.dmub_srv; local in function:dm_dmub_hw_init 777 if (!dmub_srv) 792 status = dmub_srv_has_hw_support(dmub_srv, &has_hw_support); 847 status = dmub_srv_hw_init(dmub_srv, &hw_params); 854 status = dmub_srv_wait_for_auto_load(dmub_srv, 100000); 864 adev->dm.dc->ctx->dmub_srv = dc_dmub_srv_create(adev->dm.dc, dmub_srv); 1180 struct dmub_srv *dmub_srv; local in function:dm_dmub_sw_init [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/ |
amdgpu_command_table2.c | 184 if (bp->base.ctx->dc->ctx->dmub_srv && 186 encoder_control_dmcub(bp->base.ctx->dmub_srv, ¶ms); 200 if (bp->base.ctx->dc->ctx->dmub_srv && 289 if (bp->base.ctx->dc->ctx->dmub_srv && 291 transmitter_control_dmcub(bp->base.ctx->dmub_srv, &ps.param); 305 if (bp->base.ctx->dc->ctx->dmub_srv && 432 if (bp->base.ctx->dc->ctx->dmub_srv && 434 set_pixel_clock_dmcub(bp->base.ctx->dmub_srv, &clk); 448 if (bp->base.ctx->dc->ctx->dmub_srv && 743 if (bp->base.ctx->dc->ctx->dmub_srv & [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
amdgpu_dcn21_hubp.c | 773 struct dc_dmub_srv *dmcub = hubp->ctx->dmub_srv;
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
amdgpu_dc.c | 2476 if (dc->ctx->dmub_srv) 2477 dc_dmub_srv_wait_phy_init(dc->ctx->dmub_srv);
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