/src/sys/external/bsd/drm2/dist/drm/i915/display/ |
intel_dpll_mgr.h | 173 u32 dpll_md; member in struct:intel_dpll_hw_state
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intel_display.c | 1426 I915_WRITE(DPLL_MD(pipe), pipe_config->dpll_hw_state.dpll_md); 1427 POSTING_READ(DPLL_MD(pipe)); 1483 I915_WRITE(DPLL_MD(PIPE_B), pipe_config->dpll_hw_state.dpll_md); 1485 dev_priv->chv_dpll_md[pipe] = pipe_config->dpll_hw_state.dpll_md; 1493 I915_WRITE(DPLL_MD(pipe), pipe_config->dpll_hw_state.dpll_md); 1494 POSTING_READ(DPLL_MD(pipe)); 1533 I915_WRITE(DPLL_MD(crtc->pipe) 8542 u32 dpll_md = (crtc_state->pixel_multiplier - 1) local in function:i9xx_compute_dpll [all...] |
intel_dpll_mgr.c | 494 DRM_DEBUG_KMS("dpll_hw_state: dpll: 0x%x, dpll_md: 0x%x, " 497 hw_state->dpll_md, 3906 DRM_DEBUG_KMS("dpll_hw_state: dpll: 0x%x, dpll_md: 0x%x, " 3909 hw_state->dpll_md,
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/src/sys/external/bsd/drm2/dist/drm/i915/ |
i915_debugfs.c | 2757 seq_printf(m, " dpll_md: 0x%08x\n", 2758 pll->state.hw_state.dpll_md);
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