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    Searched refs:dpp_set_degamma (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
dpp.h 193 void (*dpp_set_degamma)( member in struct:dpp_funcs
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_hwseq.c 851 dpp_base->funcs->dpp_set_degamma(dpp_base,
877 dpp_base->funcs->dpp_set_degamma(dpp_base,
881 dpp_base->funcs->dpp_set_degamma(dpp_base,
885 dpp_base->funcs->dpp_set_degamma(dpp_base,
889 dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_USER_PWL);
899 dpp_base->funcs->dpp_set_degamma(dpp_base,
907 dpp_base->funcs->dpp_set_degamma(dpp_base,
amdgpu_dcn20_dpp.c 470 .dpp_set_degamma = dpp2_set_degamma,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_dpp.c 536 .dpp_set_degamma = dpp1_set_degamma,
amdgpu_dcn10_hw_sequencer.c 1474 dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_BYPASS);
1478 dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_HW_sRGB);
1481 dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_HW_xvYCC);
1484 dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_BYPASS);
1487 dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_USER_PWL);
1497 dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_BYPASS);

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