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    Searched refs:drv_mask (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/arch/arm/rockchip/
rk3399_iomux.c 269 uint32_t drv_mask, drv_val; local in function:rk3399_iomux_set_drive_strength
286 drv_mask = 0x3 << ((idx & 7) * 2);
290 drv_mask = 0x3 << ((idx & 7) * 2);
298 drv_mask = 0x7 << ((idx & 7) * 3);
302 drv_mask = 0x3 << ((idx & 7) * 2);
312 drv_mask = 0x3 << ((idx & 7) * 2);
316 drv_mask = 0x7 << ((idx & 7) * 3);
320 drv_mask = 0x3 << ((idx & 7) * 2);
324 drv_mask = 0x3 << ((idx & 7) * 2);
333 drv_val = __SHIFTIN(val, drv_mask);
    [all...]
  /src/sys/arch/cobalt/stand/boot/
wdc.c 49 static int __wdcwait_reset(struct wdc_channel *chp, int drv_mask);
55 __wdcwait_reset(struct wdc_channel *chp, int drv_mask)
69 if ((drv_mask & 0x01) == 0) {
71 if ((drv_mask & 0x02) != 0 && (st1 & WDCS_BSY) == 0) {
75 } else if ((drv_mask & 0x02) == 0) {
77 if ((drv_mask & 0x01) != 0 && (st0 & WDCS_BSY) == 0) {
91 /* Reset timed out. Maybe it's because drv_mask was not right */
93 drv_mask &= ~0x01;
95 drv_mask &= ~0x02;
98 return drv_mask;
    [all...]
  /src/sys/arch/mmeye/stand/boot/
wdc.c 58 static int __wdcwait_reset(struct wdc_channel *chp, int drv_mask);
64 __wdcwait_reset(struct wdc_channel *chp, int drv_mask)
78 if ((drv_mask & 0x01) == 0) {
80 if ((drv_mask & 0x02) != 0 && (st1 & WDCS_BSY) == 0) {
84 } else if ((drv_mask & 0x02) == 0) {
86 if ((drv_mask & 0x01) != 0 && (st0 & WDCS_BSY) == 0) {
100 /* Reset timed out. Maybe it's because drv_mask was not right */
102 drv_mask &= ~0x01;
104 drv_mask &= ~0x02;
107 return drv_mask;
    [all...]
  /src/sys/arch/bebox/stand/boot/
wdc.c 61 __wdcwait_reset(struct wdc_channel *chp, int drv_mask)
75 if ((drv_mask & 0x01) == 0) {
77 if ((drv_mask & 0x02) != 0 && (st1 & WDCS_BSY) == 0) {
81 } else if ((drv_mask & 0x02) == 0) {
83 if ((drv_mask & 0x01) != 0 && (st0 & WDCS_BSY) == 0) {
97 /* Reset timed out. Maybe it's because drv_mask was not right */
99 drv_mask &= ~0x01;
101 drv_mask &= ~0x02;
104 return drv_mask;
  /src/sys/dev/ic/
wdc.c 1098 __wdcwait_reset(struct ata_channel *chp, int drv_mask, int poll)
1115 if ((drv_mask & 0x01) != 0) {
1134 if ((drv_mask & 0x02) != 0) {
1154 if ((drv_mask & 0x01) == 0) {
1156 if ((drv_mask & 0x02) != 0 && (st1 & WDCS_BSY) == 0) {
1160 if ((drv_mask & 0x02) == 0) {
1164 } else if ((drv_mask & 0x02) == 0) {
1166 if ((drv_mask & 0x01) != 0 && (st0 & WDCS_BSY) == 0) {
1178 /* Reset timed out. Maybe it's because drv_mask was not right */
1180 drv_mask &= ~0x01
    [all...]
  /src/sys/arch/arm/sunxi/
sunxi_gpio.c 300 const uint32_t drv_mask = SUNXI_GPIO_DRV_PINMASK(pin_def->pin); local in function:sunxi_gpio_setdrv
303 drv &= ~drv_mask;
304 drv |= __SHIFTIN((drive_strength / 10) - 1, drv_mask);

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