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    Searched refs:ds_ctl0 (Results 1 - 16 of 16) sorted by relevancy

  /src/sys/external/isc/atheros_hal/dist/ar5416/
ar5416_xmit.c 187 ads->ds_ctl0 = (pktLen & AR_FrameLen)
216 ads->ds_ctl0 |= AR_DestIdxValid;
227 ads->ds_ctl0 |= (flags & HAL_TXDESC_CTSENA ? AR_CTSEnable : 0)
284 ads->ds_ctl0 = 0;
297 ads->ds_ctl0 = 0;
341 ads->ds_ctl0 = (pktLen & AR_FrameLen);
349 ads->ds_ctl0 |= AR_DestIdxValid;
360 ads->ds_ctl0 = 0;
366 ads->ds_ctl0 = 0;
393 ads->ds_ctl0 |= (txPower << AR_XmitPower_S
    [all...]
ar5416desc.h 70 uint32_t ds_ctl0; /* DMA control 0 */ member in struct:ar5416_desc
105 /* ds_ctl0 */
288 /* ds_ctl0 */
  /src/sys/external/isc/atheros_hal/dist/ar5210/
ar5210_xmit.c 506 ads->ds_ctl0 = (pktLen & AR_FrameLen)
516 ads->ds_ctl0 |= AR_EncryptKeyValid;
520 ads->ds_ctl0 |= AR_RTSCTSEnable;
544 ads->ds_ctl0 |= AR_TxInterReq;
568 ads->ds_ctl0 = AR5210DESC_CONST(ds0)->ds_ctl0;
574 ads->ds_ctl0 = 0;
605 ts->ts_rate = MS(ads->ds_ctl0, AR_XmitRate);
ar5210desc.h 33 uint32_t ds_ctl0; /* DMA control 0 */ member in struct:ar5210_desc
41 /* TX ds_ctl0 */
ar5210_recv.c 186 ads->ds_ctl0 = 0;
  /src/sys/external/isc/atheros_hal/dist/ar5211/
ar5211desc.h 33 uint32_t ds_ctl0; /* DMA control 0 */ member in struct:ar5211_desc
41 /* TX ds_ctl0 */
ar5211_xmit.c 535 ads->ds_ctl0 = (pktLen & AR_FrameLen)
550 ads->ds_ctl0 |= AR_EncryptKeyValid;
574 ads->ds_ctl0 |= AR_TxInterReq;
598 ads->ds_ctl0 = AR5211DESC_CONST(ds0)->ds_ctl0;
604 ads->ds_ctl0 = 0;
635 ts->ts_rate = MS(ads->ds_ctl0, AR_XmitRate);
ar5211_recv.c 180 ads->ds_ctl0 = 0;
  /src/sys/external/isc/atheros_hal/dist/
ah_desc.h 190 uint32_t ds_ctl0; /* opaque DMA control 0 */ member in struct:ath_desc
  /src/sys/external/isc/atheros_hal/dist/ar5212/
ar5212desc.h 33 uint32_t ds_ctl0; /* DMA control 0 */ member in struct:ar5212_desc
58 /* TX ds_ctl0 */
ar5212_xmit.c 693 ads->ds_ctl0 = (pktLen & AR_FrameLen)
714 ads->ds_ctl0 |= AR_DestIdxValid;
724 ads->ds_ctl0 |= (flags & HAL_TXDESC_CTSENA ? AR_CTSEnable : 0)
772 ads->ds_ctl0 |= __bswap32(AR_TxInterReq);
774 ads->ds_ctl0 |= AR_TxInterReq;
799 ads->ds_ctl0 = 0;
812 ads->ds_ctl0 = 0;
827 ds->ds_ctl0 = __bswap32(ds->ds_ctl0);
ar5212_recv.c 218 ads->ds_ctl0 = 0;
  /src/sys/dev/ic/
arn5008.c 1127 ds->ds_ctl0 = SM(AR_TXC0_FRAME_LEN, totlen);
1128 ds->ds_ctl0 |= SM(AR_TXC0_XMIT_POWER, AR_MAX_RATE_POWER);
1479 ds->ds_ctl0 = AR_TXC0_INTR_REQ | AR_TXC0_CLR_DEST_MASK;
1481 ds->ds_ctl0 |= SM(AR_TXC0_XMIT_POWER, txpower);
1518 ds->ds_ctl0 |= AR_TXC0_DEST_IDX_VALID;
1529 ds->ds_ctl0 |= AR_TXC0_RTS_ENABLE;
1534 ds->ds_ctl0 |= AR_TXC0_RTS_ENABLE;
1536 ds->ds_ctl0 |= AR_TXC0_CTS_ENABLE;
1539 if (ds->ds_ctl0 & (AR_TXC0_RTS_ENABLE | AR_TXC0_CTS_ENABLE)) {
1603 if (ds->ds_ctl0 & (AR_TXC0_RTS_ENABLE | AR_TXC0_CTS_ENABLE))
    [all...]
arn5008reg.h 672 uint32_t ds_ctl0; member in struct:ar_tx_desc
701 /* Bits for ds_ctl0. */
856 uint32_t ds_ctl0; member in struct:ar_rx_desc
athrate-sample.c 494 const struct ar5212_desc *ads = (const struct ar5212_desc *)&ds->ds_ctl0;
502 frame_size = ds0->ds_ctl0 & 0x0fff; /* low-order 12 bits of ds_ctl0 */
ath.c 865 ds->ds_ctl0 = htole32(ds->ds_ctl0);
4074 ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1]);
5241 ds->ds_ctl0, ds->ds_ctl1,
5260 ds->ds_ctl0, ds->ds_ctl1,

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