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    Searched refs:dsc_mode (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
stream_encoder.h 111 uint32_t dsc_mode; // DISABLED 0; 1 or 2 indicate enabled state. member in struct:enc_state
223 enum optc_dsc_mode dsc_mode,
timing_generator.h 270 enum optc_dsc_mode dsc_mode,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_stream_encoder.c 276 * dsc_mode: 0 disables DSC, other values enable DSC in specified format
281 enum optc_dsc_mode dsc_mode,
288 DP_DSC_MODE, dsc_mode,
355 REG_GET(DP_DSC_CNTL, DP_DSC_MODE, &s->dsc_mode);
356 if (s->dsc_mode) {
dcn20_optc.h 92 enum optc_dsc_mode dsc_mode,
amdgpu_dcn20_optc.c 193 * dsc_mode: 0 disables DSC, other values enable DSC in specified format
198 enum optc_dsc_mode dsc_mode,
205 OPTC_DSC_MODE, dsc_mode);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_hw_sequencer.c 411 DTN_INFO("S_ENC: DSC_MODE SEC_GSP7_LINE_NUM"
421 s.dsc_mode,

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