| /src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/cavium-octeon/ |
| dlink_dsr-500n.dts | 3 * Device tree source for D-Link DSR-500N.
12 model = "dlink,dsr-500n";
13 compatible = "dlink,dsr-500n", "cavium,octeon-3860";
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| dlink_dsr-1000n.dts | 3 * Device tree source for D-Link DSR-1000N.
12 model = "dlink,dsr-1000n";
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| /src/sys/arch/mvmeppc/mvmeppc/ |
| platform_160x.c | 93 u_int8_t dsr; local in function:p160x_match
119 dsr = inb(0x80000804);
120 bootinfo.bi_memsize = p160x_dram_size[dsr & 0x7];
121 bootinfo.bi_memsize += p160x_dram_size[(dsr >> 4) & 0x7];
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| /src/sys/arch/acorn32/podulebus/ |
| if_ne_pbus.c | 445 int dsr; local in function:em_postattach
455 dsr = bus_space_read_1(sc->sc_ne2000.sc_asict,
459 if (!(dsr & EM_DSR_20M))
461 if (!(dsr & EM_DSR_TCOK))
465 if (dsr & EM_DSR_POL)
467 if (dsr & EM_DSR_JAB)
469 if (dsr & EM_DSR_LNK)
471 if (dsr & EM_DSR_LBK)
473 if (dsr & EM_DSR_UTP)
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| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| am335x-netcom-plus-2xx.dts | 28 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* DSR */
41 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* DSR */
61 dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
72 dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
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| am335x-baltos-ir3220.dts | 34 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */
47 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad13.gpio1[13] DSR */
66 dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
77 dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
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| am335x-baltos-ir5221.dts | 42 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */
55 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad13.gpio1[13] DSR */
74 dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
85 dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
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| am335x-baltos-ir2110.dts | 28 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */
45 dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
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| imx6dl-eckelmann-ci4x10.dts | 233 MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x0001b010 /* DSR */
245 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x0001b010 /* DSR */
328 dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
339 dsr-gpios = <&gpio6 16 GPIO_ACTIVE_LOW>;
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| at91-wb50n.dtsi | 94 dsr-gpios = <&pioD 11 GPIO_ACTIVE_LOW>;
|
| imx6qdl-dhcom-som.dtsi | 365 dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
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| tegra20-colibri.dtsi | 266 uart-a-dsr {
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| /src/sys/dev/ic/ |
| hd64570.c | 1229 u_int8_t dsr; local in function:sca_dmac_intr
1241 dsr = 1;
1242 while (dsr != 0) {
1247 dsr = dmac_read_1(scp, SCA_DSR1);
1249 dsr | SCA_DSR_DEWD);
1254 dsr &= ( SCA_DSR_COF | SCA_DSR_BOF | SCA_DSR_EOT);
1255 if (dsr == 0)
1261 if (dsr & SCA_DSR_COF) {
1273 if (dsr & SCA_DSR_BOF) {
1295 if (dsr & SCA_DSR_EOT)
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/riscv/boot/dts/canaan/ |
| k210.dtsi | 210 dsr-override;
227 dsr-override;
244 dsr-override;
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| /src/sys/dev/acpi/ |
| apei.c | 610 uint32_t dcsr, dsr; local in function:apei_cper_pcie_error_report
633 dsr = __SHIFTOUT(dcsr, __BITS(31,16));
634 if (dsr != 0) {
646 "\0", dsr);
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| /src/sys/arch/alpha/alpha/ |
| machdep.c | 959 * Retrieve the platform name from the DSR.
964 struct dsrdb *dsr; local in function:alpha_dsr_sysname
968 * DSR does not exist on early HWRPB versions.
973 dsr = (struct dsrdb *)(((char *)hwrpb) + hwrpb->rpb_dsrdb_off);
974 sysname = (const char *)((char *)dsr + (dsr->dsr_sysname_off +
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| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/ |
| imx8mm-venice-gw7901.dts | 641 dsr-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
| imx8mm-venice-gw7902.dts | 597 dsr-gpios = <&gpio4 4 GPIO_ACTIVE_LOW>;
839 MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x140 /* DSR */
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