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Searched
refs:dst_y_per_pte_row_nom_c
(Results
1 - 11
of
11
) sorted by relevancy
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/
amdgpu_dcn21_hubp.c
517
DST_Y_PER_PTE_ROW_NOM_C
, &dlg_attr.
dst_y_per_pte_row_nom_c
);
554
if (dlg_attr.
dst_y_per_pte_row_nom_c
!= dml_dlg_attr->
dst_y_per_pte_row_nom_c
)
555
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_2:
DST_Y_PER_PTE_ROW_NOM_C
- Expected: %u Actual: %u\n",
556
dml_dlg_attr->
dst_y_per_pte_row_nom_c
, dlg_attr.
dst_y_per_pte_row_nom_c
);
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/
amdgpu_display_rq_dlg_helpers.c
273
"DML_RQ_DLG_CALC:
dst_y_per_pte_row_nom_c
= 0x%0x\n",
274
dlg_regs.
dst_y_per_pte_row_nom_c
);
display_mode_structs.h
443
unsigned int
dst_y_per_pte_row_nom_c
;
member in struct:_vcs_dpi_display_dlg_regs_st
amdgpu_dml1_display_rq_dlg_calc.c
1554
disp_dlg_regs->
dst_y_per_pte_row_nom_c
= (unsigned int) ((double) dpte_row_height_c
1556
ASSERT(disp_dlg_regs->
dst_y_per_pte_row_nom_c
< (unsigned int) dml_pow(2, 17));
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_hubp.c
136
DST_Y_PER_PTE_ROW_NOM_C
, dlg_attr->
dst_y_per_pte_row_nom_c
);
1141
DST_Y_PER_PTE_ROW_NOM_C
, &dlg_attr->
dst_y_per_pte_row_nom_c
);
1419
DST_Y_PER_PTE_ROW_NOM_C
, &dlg_attr.
dst_y_per_pte_row_nom_c
);
1456
if (dlg_attr.
dst_y_per_pte_row_nom_c
!= dml_dlg_attr->
dst_y_per_pte_row_nom_c
)
1457
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_2:
DST_Y_PER_PTE_ROW_NOM_C
- Expected: %u Actual: %u\n",
1458
dml_dlg_attr->
dst_y_per_pte_row_nom_c
, dlg_attr.dst_y_per_pte_row_nom_c)
[
all
...]
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/
amdgpu_display_rq_dlg_calc_20.c
1455
disp_dlg_regs->
dst_y_per_pte_row_nom_c
= (unsigned int) ((double) dpte_row_height_c
1457
if (disp_dlg_regs->
dst_y_per_pte_row_nom_c
>= (unsigned int) dml_pow(2, 17)) {
1458
dml_print("DML_DLG: %s: Warning
dst_y_per_pte_row_nom_c
%u larger than supported by register format U15.2 %u\n",
1460
disp_dlg_regs->
dst_y_per_pte_row_nom_c
,
amdgpu_display_rq_dlg_calc_20v2.c
1456
disp_dlg_regs->
dst_y_per_pte_row_nom_c
= (unsigned int) ((double) dpte_row_height_c
1458
if (disp_dlg_regs->
dst_y_per_pte_row_nom_c
>= (unsigned int) dml_pow(2, 17)) {
1459
dml_print("DML_DLG: %s: Warning
dst_y_per_pte_row_nom_c
%u larger than supported by register format U15.2 %u\n",
1461
disp_dlg_regs->
dst_y_per_pte_row_nom_c
,
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/
amdgpu_display_rq_dlg_calc_21.c
1550
disp_dlg_regs->
dst_y_per_pte_row_nom_c
= (unsigned int) ((double) dpte_row_height_c
1552
if (disp_dlg_regs->
dst_y_per_pte_row_nom_c
>= (unsigned int) dml_pow(2, 17)) {
1554
"DML_DLG: %s: Warning
dst_y_per_pte_row_nom_c
%u larger than supported by register format U15.2 %u\n",
1556
disp_dlg_regs->
dst_y_per_pte_row_nom_c
,
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_hw_sequencer_debug.c
274
dlg_regs->
dst_y_per_pte_row_nom_c
, dlg_regs->refcyc_per_pte_group_nom_l,
amdgpu_dcn10_hubp.c
631
DST_Y_PER_PTE_ROW_NOM_C
, dlg_attr->
dst_y_per_pte_row_nom_c
);
949
DST_Y_PER_PTE_ROW_NOM_C
, &dlg_attr->
dst_y_per_pte_row_nom_c
);
amdgpu_dcn10_hw_sequencer.c
241
dlg_regs->
dst_y_per_pte_row_nom_c
, dlg_regs->refcyc_per_pte_group_nom_l,
1767
"
dst_y_per_pte_row_nom_c
: %d, \n"
1781
pipe_ctx->dlg_regs.
dst_y_per_pte_row_nom_c
,
Completed in 69 milliseconds
Indexes created Sun Oct 19 02:09:48 GMT 2025