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    Searched refs:dummy_irq_entry (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn10/
amdgpu_irq_service_dcn10.c 249 #define dummy_irq_entry() \ macro
255 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
258 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
261 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
264 [DC_IRQ_SOURCE_DC ## reg_num ## UNDERFLOW] = dummy_irq_entry()
273 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
298 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
303 [DC_IRQ_SOURCE_PFLIP5] = dummy_irq_entry(),
304 [DC_IRQ_SOURCE_PFLIP6] = dummy_irq_entry(),
305 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn20/
amdgpu_irq_service_dcn20.c 253 #define dummy_irq_entry() \ macro
259 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
262 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
265 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
268 [DC_IRQ_SOURCE_DC ## reg_num ## UNDERFLOW] = dummy_irq_entry()
277 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
302 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
307 [DC_IRQ_SOURCE_PFLIP5] = dummy_irq_entry(),
308 [DC_IRQ_SOURCE_PFLIP6] = dummy_irq_entry(),
309 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn21/
amdgpu_irq_service_dcn21.c 246 #define dummy_irq_entry() \ macro
252 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
255 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
258 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
261 [DC_IRQ_SOURCE_DC ## reg_num ## UNDERFLOW] = dummy_irq_entry()
270 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
293 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
298 [DC_IRQ_SOURCE_PFLIP5] = dummy_irq_entry(),
299 [DC_IRQ_SOURCE_PFLIP6] = dummy_irq_entry(),
300 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce110/
amdgpu_irq_service_dce110.c 172 #define dummy_irq_entry() \ macro
178 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
181 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
184 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
187 [DC_IRQ_SOURCE_DC ## reg_num ## UNDERFLOW] = dummy_irq_entry()
240 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
265 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
272 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
310 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
311 [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce120/
amdgpu_irq_service_dce120.c 167 #define dummy_irq_entry() \ macro
173 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
176 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
179 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
182 [DC_IRQ_SOURCE_DC ## reg_num ## UNDERFLOW] = dummy_irq_entry()
191 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
216 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
223 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
261 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
262 [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce80/
amdgpu_irq_service_dce80.c 176 #define dummy_irq_entry() \ macro
182 [DC_IRQ_SOURCE_I2C_DDC ## reg_num] = dummy_irq_entry()
185 [DC_IRQ_SOURCE_DPSINK ## reg_num] = dummy_irq_entry()
188 [DC_IRQ_SOURCE_GPIOPAD ## reg_num] = dummy_irq_entry()
191 [DC_IRQ_SOURCE_DC ## reg_num ## UNDERFLOW] = dummy_irq_entry()
201 [DC_IRQ_SOURCE_INVALID] = dummy_irq_entry(),
226 [DC_IRQ_SOURCE_TIMER] = dummy_irq_entry(),
233 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
271 [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
272 [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
    [all...]

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