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    Searched refs:dwbc20 (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_dwb.c 39 dwbc20->dwbc_regs->reg
42 dwbc20->base.ctx
45 dwbc20->base.ctx->logger
48 dwbc20->dwbc_shift->field_name, dwbc20->dwbc_mask->field_name
57 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); local
69 DC_LOG_DWB("%s SUPPORTED! inst = %d", __func__, dwbc20->base.inst);
72 DC_LOG_DWB("%s NOT SUPPORTED! inst = %d", __func__, dwbc20->base.inst);
79 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); local
80 DC_LOG_DWB("%s inst = %d", __func__, dwbc20->base.inst)
106 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); local
142 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); local
165 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); local
205 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); local
218 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); local
234 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); local
243 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); local
257 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); local
    [all...]
amdgpu_dcn20_dwb_scl.c 42 dwbc20->dwbc_regs->reg
45 dwbc20->base.ctx
49 dwbc20->dwbc_shift->field_name, dwbc20->dwbc_mask->field_name
688 struct dcn20_dwbc *dwbc20,
724 bool dwb_program_horz_scalar(struct dcn20_dwbc *dwbc20,
793 wbscl_set_scaler_filter(dwbc20, h_taps_luma,
796 wbscl_set_scaler_filter(dwbc20, h_taps_chroma,
802 bool dwb_program_vert_scalar(struct dcn20_dwbc *dwbc20,
872 wbscl_set_scaler_filter(dwbc20, v_taps_luma
    [all...]
dcn20_dwb.h 424 void dcn20_dwbc_construct(struct dcn20_dwbc *dwbc20,
446 bool dwb_program_vert_scalar(struct dcn20_dwbc *dwbc20,
452 bool dwb_program_horz_scalar(struct dcn20_dwbc *dwbc20,
amdgpu_dcn20_resource.c 3073 struct dcn20_dwbc *dwbc20 = kzalloc(sizeof(struct dcn20_dwbc), local
3076 if (!dwbc20) {
3077 dm_error("DC: failed to create dwbc20!\n");
3080 dcn20_dwbc_construct(dwbc20, ctx,
3085 pool->dwbc[i] = &dwbc20->base;

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