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    Searched refs:ebase (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/arch/mips/rmi/
rmixl_cpu.c 249 uint32_t ebase; local
256 asm volatile("dmfc0 %0, $15, 1;" : "=r"(ebase));
257 ci->ci_cpuid = ebase & __BITS(9,0);
323 uint32_t ebase = mipsNN_cp0_ebase_read(); local
324 KASSERT((ebase & MIPS_EBASE_CPUNUM) == ci->ci_cpuid);
  /src/sys/arch/mips/mips/
mips_fixup.c 53 int32_t ebase = mipsNN_cp0_ebase_read(); local
55 if (ebase == mips_options.mips_cpu_id
56 || (ebase & __BITS(31,30)) != __BIT(31)) {
59 start = (uint32_t *)(intptr_t)(ebase & ~MIPS_EBASE_CPUNUM);
mips_machdep.c 1085 const intptr_t ebase = (intptr_t)mipsNN_cp0_ebase_read(); local
1086 const int cpunum = ebase & MIPS_EBASE_CPUNUM;
1088 // This may need to be on CPUs other CPU0 so use EBASE to fetch
1089 // the appropriate address for exception code. EBASE also contains
1091 memcpy((void *)(intptr_t)(ebase & ~MIPS_EBASE_CPUNUM), mips64r2_tlb_miss,
  /src/sys/dev/usb/
udl.c 1206 int sbase, soff, ebase, eoff, dbase, doff, width_cur; local
1209 ebase = (sy + height) * sc->sc_width;
1214 eoff = ebase + sx;
1238 int sbase, soff, ebase, eoff, width_cur; local
1241 ebase = (y + height) * sc->sc_width;
1245 eoff = ebase + x;
1266 int sbase, soff, ebase, eoff, x, y, width, width_cur, height; local
1273 ebase = (y + height) * sc->sc_width;
1277 eoff = ebase + x;

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