| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/arm/ |
| foundation-v8-psci.dtsi | 15 enable-method = "psci";
19 enable-method = "psci";
23 enable-method = "psci";
27 enable-method = "psci";
|
| foundation-v8-spin-table.dtsi | 8 enable-method = "spin-table";
13 enable-method = "spin-table";
18 enable-method = "spin-table";
23 enable-method = "spin-table";
|
| /src/sys/arch/arm/at91/ |
| at91pmcvar.h | 32 void at91pmc_peripheral_clock(int pid, int enable);
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/cavium/ |
| thunder-88xx.dtsi | 69 enable-method = "psci";
75 enable-method = "psci";
81 enable-method = "psci";
87 enable-method = "psci";
93 enable-method = "psci";
99 enable-method = "psci";
105 enable-method = "psci";
111 enable-method = "psci";
117 enable-method = "psci";
123 enable-method = "psci"
[all...] |
| /src/sys/dev/usb/ |
| auvitek_board.c | 53 uint16_t enable; member in struct:auvitek_board_config
58 .enable = 0x02f0,
63 .enable = 0x02f0,
71 uint16_t reset, enable; local in function:auvitek_board_init
77 enable = auvitek_board_config[sc->sc_board].enable;
90 if (enable) {
91 auvitek_write_1(sc, AU0828_REG_GPIO2_PINDIR, enable >> 8);
92 auvitek_write_1(sc, AU0828_REG_GPIO1_PINDIR, enable & 0xff);
93 auvitek_write_1(sc, AU0828_REG_GPIO2_OUTEN, enable >> 8)
[all...] |
| /src/sys/external/bsd/drm/dist/ |
| autogen.sh | 12 $srcdir/configure --enable-maintainer-mode "$@"
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce110/ |
| irq_service_dce110.h | 44 bool enable);
53 bool enable);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/ |
| command_table.h | 53 bool enable);
59 bool enable,
64 bool enable,
69 bool enable);
72 bool enable);
79 bool enable);
83 bool enable);
|
| command_table2.h | 53 bool enable);
59 bool enable,
64 bool enable,
69 bool enable);
72 bool enable);
79 bool enable);
83 bool enable);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_pm.h | 47 void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable);
48 void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable);
49 void amdgpu_dpm_enable_jpeg(struct amdgpu_device *adev, bool enable);
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| omap3-beagle-xm-ab.dts | 9 /* HS USB Port 2 Power enable was inverted with the xM C */
11 enable-active-high;
|
| tegra30-asus-nexus7-grouper.dtsi | 30 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
37 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
44 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
51 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
58 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
65 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
72 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
79 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
86 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
93 nvidia,enable-input = <TEGRA_PIN_ENABLE>
[all...] |
| tegra124-nyan-big.dts | 44 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
51 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
58 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
65 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
72 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
79 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
86 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
93 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
100 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
107 nvidia,enable-input = <TEGRA_PIN_DISABLE>
[all...] |
| tegra124-nyan-blaze.dts | 42 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
49 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
56 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
63 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
70 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
77 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
84 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
91 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
98 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
105 nvidia,enable-input = <TEGRA_PIN_DISABLE>
[all...] |
| tegra30-beaver.dts | 77 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
84 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
91 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
98 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
105 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
112 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
119 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
126 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
133 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
140 nvidia,enable-input = <TEGRA_PIN_ENABLE>
[all...] |
| nuvoton-npcm750-runbmc-olympus-pincfg.dtsi | 29 input-enable;
34 input-enable;
39 input-enable;
54 input-enable;
59 input-enable;
84 input-enable;
89 input-enable;
99 input-enable;
104 input-enable;
109 input-enable;
[all...] |
| ste-href-ab8500.dtsi | 51 input-enable;
64 input-enable;
77 input-enable;
90 input-enable;
103 input-enable;
116 input-enable;
129 input-enable;
142 input-enable;
155 input-enable;
168 input-enable;
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/marvell/ |
| armada-ap810-ap0-octa-core.dtsi | 20 enable-method = "psci";
26 enable-method = "psci";
32 enable-method = "psci";
38 enable-method = "psci";
44 enable-method = "psci";
50 enable-method = "psci";
56 enable-method = "psci";
62 enable-method = "psci";
|
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_fifo_underrun.h | 18 enum pipe pipe, bool enable);
21 bool enable);
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/rockchip/ |
| px30-engicam-ctouch2.dtsi | 12 bt_enable_h: bt-enable-h {
18 wifi_enable_h: wifi-enable-h {
29 enable-gpio = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>;
|
| /src/sys/arch/mips/cavium/dev/ |
| octeon_asx.c | 70 octasx_enable(struct octasx_softc *sc, int enable)
73 octasx_enable_tx(sc, enable);
74 octasx_enable_rx(sc, enable);
79 octasx_enable_tx(struct octasx_softc *sc, int enable)
84 if (enable)
93 octasx_enable_rx(struct octasx_softc *sc, int enable)
98 if (enable)
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/ |
| mt6358.dtsi | 26 regulator-enable-ramp-delay = <0>;
36 regulator-enable-ramp-delay = <200>;
46 regulator-enable-ramp-delay = <250>;
55 regulator-enable-ramp-delay = <200>;
65 regulator-enable-ramp-delay = <200>;
75 regulator-enable-ramp-delay = <200>;
84 regulator-enable-ramp-delay = <0>;
93 regulator-enable-ramp-delay = <900>;
103 regulator-enable-ramp-delay = <0>;
111 regulator-enable-ramp-delay = <3300>
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/nvidia/ |
| tegra210-p2571.dts | 20 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
29 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
38 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
47 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
56 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
64 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
72 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
80 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
88 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
96 nvidia,enable-input = <TEGRA_PIN_DISABLE>
[all...] |
| tegra210-p2595.dtsi | 16 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
25 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
34 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
43 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
52 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
60 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
68 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
76 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
84 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
92 nvidia,enable-input = <TEGRA_PIN_ENABLE>
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
| dc_link_dp.h | 76 void dp_enable_mst_on_sink(struct dc_link *link, bool enable);
84 void dp_set_fec_enable(struct dc_link *link, bool enable);
85 bool dp_set_dsc_enable(struct pipe_ctx *pipe_ctx, bool enable);
86 bool dp_set_dsc_pps_sdp(struct pipe_ctx *pipe_ctx, bool enable);
87 void dp_set_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable);
|
