| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/fifo/ |
| nouveau_nvkm_engine_fifo_channv50.c | 93 nvkm_kmap(chan->eng);
94 nvkm_wo32(chan->eng, offset + 0x00, 0x00000000);
95 nvkm_wo32(chan->eng, offset + 0x04, 0x00000000);
96 nvkm_wo32(chan->eng, offset + 0x08, 0x00000000);
97 nvkm_wo32(chan->eng, offset + 0x0c, 0x00000000);
98 nvkm_wo32(chan->eng, offset + 0x10, 0x00000000);
99 nvkm_wo32(chan->eng, offset + 0x14, 0x00000000);
100 nvkm_done(chan->eng);
121 nvkm_kmap(chan->eng);
122 nvkm_wo32(chan->eng, offset + 0x00, 0x00190000)
[all...] |
| nouveau_nvkm_engine_fifo_chang84.c | 125 nvkm_kmap(chan->eng);
126 nvkm_wo32(chan->eng, offset + 0x00, 0x00000000);
127 nvkm_wo32(chan->eng, offset + 0x04, 0x00000000);
128 nvkm_wo32(chan->eng, offset + 0x08, 0x00000000);
129 nvkm_wo32(chan->eng, offset + 0x0c, 0x00000000);
130 nvkm_wo32(chan->eng, offset + 0x10, 0x00000000);
131 nvkm_wo32(chan->eng, offset + 0x14, 0x00000000);
132 nvkm_done(chan->eng);
152 nvkm_kmap(chan->eng);
153 nvkm_wo32(chan->eng, offset + 0x00, 0x00190000)
[all...] |
| channv50.h | 16 struct nvkm_gpuobj *eng; member in struct:nv50_fifo_chan
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/clk/ |
| nouveau_nvkm_subdev_clk_gk104.c | 48 struct gk104_clk_info eng[16]; member in struct:gk104_clk
295 struct gk104_clk_info *info = &clk->eng[idx];
364 struct gk104_clk_info *info = &clk->eng[idx];
393 struct gk104_clk_info *info = &clk->eng[idx];
418 struct gk104_clk_info *info = &clk->eng[idx];
429 struct gk104_clk_info *info = &clk->eng[idx];
444 struct gk104_clk_info *info = &clk->eng[idx];
471 for (j = 0; j < ARRAY_SIZE(clk->eng); j++) {
474 if (!clk->eng[j].freq)
487 memset(clk->eng, 0x00, sizeof(clk->eng))
[all...] |
| nouveau_nvkm_subdev_clk_gf100.c | 48 struct gf100_clk_info eng[16]; member in struct:gf100_clk
281 struct gf100_clk_info *info = &clk->eng[idx];
351 struct gf100_clk_info *info = &clk->eng[idx];
373 struct gf100_clk_info *info = &clk->eng[idx];
400 struct gf100_clk_info *info = &clk->eng[idx];
415 struct gf100_clk_info *info = &clk->eng[idx];
436 for (j = 0; j < ARRAY_SIZE(clk->eng); j++) {
437 if (!clk->eng[j].freq)
450 memset(clk->eng, 0x00, sizeof(clk->eng));
[all...] |
| nouveau_nvkm_subdev_clk_gt215.c | 41 struct gt215_clk_info eng[nv_clk_src_max]; member in struct:gt215_clk
283 &clk->eng[dom]);
294 struct gt215_clk_info *info = &clk->eng[nv_clk_src_host];
370 struct gt215_clk_info *info = &clk->eng[dom];
414 struct gt215_clk_info *info = &clk->eng[dom];
422 struct gt215_clk_info *info = &clk->eng[nv_clk_src_host];
450 struct gt215_clk_info *info = &clk->eng[dom];
467 struct gt215_clk_info *core = &clk->eng[nv_clk_src_core];
482 &clk->eng[nv_clk_src_core_intm]);
494 struct gt215_clk_info *core = &clk->eng[nv_clk_src_core]
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_gmc_v10_0.c | 273 const unsigned eng = 17; local in function:gmc_v10_0_flush_vm_hub
288 tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng);
298 WREG32_NO_KIQ(hub->vm_inv_eng0_req + eng, inv_req);
305 RREG32_NO_KIQ(hub->vm_inv_eng0_req + eng);
309 tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_ack + eng);
323 WREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng, 0);
469 unsigned eng = ring->vm_inv_eng; local in function:gmc_v10_0_emit_flush_gpu_tlb
482 hub->vm_inv_eng0_sem + eng, 0x1, 0x1);
490 amdgpu_ring_emit_reg_write_reg_wait(ring, hub->vm_inv_eng0_req + eng,
491 hub->vm_inv_eng0_ack + eng,
[all...] |
| amdgpu_gmc_v9_0.c | 483 const unsigned eng = 17; local in function:gmc_v9_0_flush_gpu_tlb
498 uint32_t req = hub->vm_inv_eng0_req + eng;
499 uint32_t ack = hub->vm_inv_eng0_ack + eng;
519 tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng);
529 WREG32_NO_KIQ(hub->vm_inv_eng0_req + eng, inv_req);
536 RREG32_NO_KIQ(hub->vm_inv_eng0_req + eng);
539 tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_ack + eng);
551 WREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng, 0);
630 unsigned eng = ring->vm_inv_eng; local in function:gmc_v9_0_emit_flush_gpu_tlb
643 hub->vm_inv_eng0_sem + eng, 0x1, 0x1)
[all...] |
| mmsch_v1_0.h | 61 struct mmsch_vf_eng_init_header eng[2]; member in struct:mmsch_v1_1_init_header
|
| amdgpu_vcn_v2_5.c | 1152 header->eng[i].table_offset = header->total_size;
1153 header->eng[i].init_status = 0;
1154 header->eng[i].table_size = 0;
1265 header->eng[i].table_size = table_size;
|
