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    Searched refs:engine_max_clock (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/
dm_pp_interface.h 116 uint32_t engine_max_clock; member in struct:amd_pp_simple_clock_info
  /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/
amdgpu_dm_pp_smu.c 370 validation_clks.engine_max_clock = 72000;
377 validation_clks.engine_max_clock = 72000;
384 DRM_INFO("DM_PPLIB: engine_max_clock: %d\n",
385 validation_clks.engine_max_clock);
392 validation_clks.engine_max_clock *= 10;
398 if (dc_clks->clocks_in_khz[i] > validation_clks.engine_max_clock) {
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_smu8_hwmgr.c 1488 info->engine_max_clock = limits->sclk;
1652 clocks->engine_max_clock = table->entries[level].clk;
1654 clocks->engine_max_clock = table->entries[table->count - 1].clk;
amdgpu_smu10_hwmgr.c 1104 clocks->engine_max_clock = 80000; /* driver can't get engine clock, temp hard code to 800MHz */
amdgpu_vega12_hwmgr.c 1694 info->engine_max_clock = max_limits->sclk;
amdgpu_vega20_hwmgr.c 2757 info->engine_max_clock = max_limits->sclk;
amdgpu_vega10_hwmgr.c 4269 info->engine_max_clock = max_limits->sclk;
amdgpu_smu7_hwmgr.c 4795 clocks->engine_max_clock = sclk_table->count > 1 ?

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