| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_navi10_ih.c | 406 uint32_t data, def, field_val; local in function:navi10_ih_update_clockgating_state
410 field_val = enable ? 0 : 1;
412 DBUS_MUX_CLK_SOFT_OVERRIDE, field_val);
414 OSSSYS_SHARE_CLK_SOFT_OVERRIDE, field_val);
416 LIMIT_SMN_CLK_SOFT_OVERRIDE, field_val);
418 DYN_CLK_SOFT_OVERRIDE, field_val);
420 REG_CLK_SOFT_OVERRIDE, field_val);
|
| amdgpu_vega10_ih.c | 688 uint32_t data, def, field_val; local in function:vega10_ih_update_clockgating_state
692 field_val = enable ? 0 : 1;
699 IH_RETRY_INT_CAM_MEM_CLK_SOFT_OVERRIDE, field_val);
701 IH_BUFFER_MEM_CLK_SOFT_OVERRIDE, field_val);
705 DBUS_MUX_CLK_SOFT_OVERRIDE, field_val);
707 OSSSYS_SHARE_CLK_SOFT_OVERRIDE, field_val);
709 LIMIT_SMN_CLK_SOFT_OVERRIDE, field_val);
711 DYN_CLK_SOFT_OVERRIDE, field_val);
713 REG_CLK_SOFT_OVERRIDE, field_val);
|
| amdgpu_psp.h | 358 uint32_t field_val, uint32_t mask, bool check_changed);
|
| amdgpu.h | 1103 #define REG_SET_FIELD(orig_val, reg, field, field_val) \
1105 (REG_FIELD_MASK(reg, field) & ((field_val) << REG_FIELD_SHIFT(reg, field))))
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| /src/sys/external/bsd/drm2/dist/drm/amd/include/ |
| cgs_common.h | 126 #define CGS_REG_SET_FIELD(orig_val, reg, field, field_val) \
128 (CGS_REG_FIELD_MASK(reg, field) & ((field_val) << CGS_REG_FIELD_SHIFT(reg, field))))
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