| /src/tests/include/sys/ |
| t_bitops.c | 48 int fls; member in struct:__anon82b63ee50108
229 ATF_CHECK_EQ_MSG((n = fls32(bits[i].val)), (m = bits[i].fls),
233 ATF_CHECK_EQ_MSG((n = fls64(bits[i].val)), (m = bits[i].fls),
250 (m = bits[i].fls + 1),
256 (m = bits[i].fls + 1),
273 (m = bits[i].fls + 9),
279 (m = bits[i].fls + 9),
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| /src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| intel_engine_pool.c | 33 n = fls(sz >> PAGE_SHIFT) - 1;
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| intel_workarounds.c | 831 slice = fls(sseu->slice_mask) - 1;
832 subslice = fls(l3_en & intel_sseu_get_subslices(sseu, slice));
836 subslice = fls(l3_en);
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| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_tc.c | 390 enum tc_port_mode live_mode = fls(live_status_mask) - 1;
405 return fls(live_status_mask) - 1;
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| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| amdgpu_pp_psm.c | 291 index = fls(hwmgr->workload_mask);
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| amdgpu_vega20_hwmgr.c | 2526 soft_max_level = mask ? (fls(mask) - 1) : 0;
2553 soft_max_level = mask ? (fls(mask) - 1) : 0;
2581 soft_max_level = mask ? (fls(mask) - 1) : 0;
2609 soft_max_level = mask ? (fls(mask) - 1) : 0;
2659 soft_max_level = mask ? (fls(mask) - 1) : 0;
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| amdgpu_vega12_hwmgr.c | 1895 soft_max_level = mask ? (fls(mask) - 1) : 0;
1915 soft_max_level = mask ? (fls(mask) - 1) : 0;
1936 soft_max_level = mask ? (fls(mask) - 1) : 0;
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| amdgpu_smu10_hwmgr.c | 846 high = mask ? (fls(mask) - 1) : 0;
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| amdgpu_vega10_hwmgr.c | 4150 data->smc_state_table.gfx_max_level = mask ? (fls(mask) - 1) : 0;
4163 data->smc_state_table.mem_max_level = mask ? (fls(mask) - 1) : 0;
4177 data->smc_state_table.soc_max_level = mask ? (fls(mask) - 1) : 0;
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| amdgpu_smu7_hwmgr.c | 4434 if (fls(tmp) != ffs(tmp))
4439 fls(tmp) - 1);
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| /src/sys/external/bsd/drm2/dist/drm/i915/ |
| intel_memory_region.c | 108 order = fls(n_pages) - 1;
|
| i915_debugfs.c | 3836 for (s = 0; s < fls(sseu->slice_mask); s++)
3843 for (s = 0; s < fls(sseu->slice_mask); s++) {
3864 for (s = 0; s < fls(sseu->slice_mask); s++) {
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| /src/sys/external/bsd/common/include/linux/ |
| bitops.h | 70 * Linux fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32, so it matches
71 * our fls semantics.
74 fls(int x) function in typeref:typename:int
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| /src/sys/external/bsd/drm2/dist/drm/i915/gem/ |
| i915_gem_internal.c | 167 int order = min(fls(npages) - 1, max_order);
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| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/device/ |
| nouveau_nvkm_engine_device_tegra.c | 145 tdev->iommu.pgshift = fls(pgsize_bitmap & ~PAGE_MASK);
|
| /src/sys/dev/pci/cxgb/ |
| cxgb_t3_hw.c | 2428 * fls: find last bit set.
2430 static __inline int fls(int x) function in typeref:typename:int
2492 V_TXDATAACKIDX(fls(p->tx_pg_size) - 12));
2605 unsigned int tstamp_re = fls(core_clk / 1000); /* 1ms, at least */
2780 unsigned int log2 = fls(mtu);
3400 log2_width = fls(adap->params.pci.width) - 1;
3744 p->tre = fls(adapter->params.vpd.cclk / (1000 / TP_TMR_RES)) -
3746 p->dack_re = fls(adapter->params.vpd.cclk / 10) - 1; /* 100us */
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| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/ |
| amdgpu_amd_powerplay.c | 971 index = fls(hwmgr->workload_mask);
976 index = fls(hwmgr->workload_mask);
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| amdgpu_smu.c | 1762 index = fls(smu->workload_mask);
1826 index = fls(smu->workload_mask);
1831 index = fls(smu->workload_mask);
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| amdgpu_renoir_ppt.c | 617 soft_max_level = mask ? (fls(mask) - 1) : 0;
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| amdgpu_arcturus_ppt.c | 807 soft_max_level = mask ? (fls(mask) - 1) : 0;
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| amdgpu_navi10_ppt.c | 958 soft_max_level = mask ? (fls(mask) - 1) : 0;
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| amdgpu_vega20_ppt.c | 1290 soft_max_level = mask ? (fls(mask) - 1) : 0;
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| /src/sys/external/bsd/drm2/dist/drm/amd/amdkfd/ |
| kfd_device.c | 591 kfd->vm_info.last_vmid_kfd = fls(gpu_resources->compute_vmid_bitmap)-1;
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| /src/sys/fs/nfs/client/ |
| nfs_clvfsops.c | 639 nmp->nm_wsize = 1 << (fls(nmp->nm_wsize) - 1);
652 nmp->nm_rsize = 1 << (fls(nmp->nm_rsize) - 1);
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| /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv50/ |
| nouveau_dispnv50_disp.c | 2520 for (i = 0; i < fls(crtcs); i++) {
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