1 /* $NetBSD: footbridge_io.c,v 1.26 2022/05/23 19:52:34 andvar Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Causality Limited 5 * Copyright (c) 1997 Mark Brinicombe. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Mark Brinicombe 19 * for the NetBSD Project. 20 * 4. The name of the company nor the name of the author may be used to 21 * endorse or promote products derived from this software without specific 22 * prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 */ 36 37 /* 38 * bus_space I/O functions for footbridge 39 */ 40 41 #include <sys/cdefs.h> 42 __KERNEL_RCSID(0, "$NetBSD: footbridge_io.c,v 1.26 2022/05/23 19:52:34 andvar Exp $"); 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/bus.h> 47 #include <arm/footbridge/footbridge.h> 48 #include <arm/footbridge/dc21285mem.h> 49 #include <uvm/uvm_extern.h> 50 51 /* Proto types for all the bus_space structure functions */ 52 53 bs_protos(footbridge); 54 bs_protos(generic); 55 bs_protos(generic_armv4); 56 bs_protos(bs_notimpl); 57 bs_map_proto(footbridge_mem); 58 bs_unmap_proto(footbridge_mem); 59 bs_mmap_proto(footbridge_io); 60 bs_mmap_proto(footbridge_mem); 61 62 /* Declare the footbridge bus space tag */ 63 64 struct bus_space footbridge_bs_tag = { 65 /* cookie */ 66 .bs_cookie = (void *) 0, /* Base address */ 67 68 /* mapping/unmapping */ 69 .bs_map = footbridge_bs_map, 70 .bs_unmap = footbridge_bs_unmap, 71 .bs_subregion = footbridge_bs_subregion, 72 73 /* allocation/deallocation */ 74 .bs_alloc = footbridge_bs_alloc, 75 .bs_free = footbridge_bs_free, 76 77 /* get kernel virtual address */ 78 .bs_vaddr = footbridge_bs_vaddr, 79 80 /* Mmap bus space for user */ 81 .bs_mmap = bs_notimpl_bs_mmap, 82 83 /* barrier */ 84 .bs_barrier = footbridge_bs_barrier, 85 86 /* read (single) */ 87 .bs_r_1 = generic_bs_r_1, 88 .bs_r_2 = generic_armv4_bs_r_2, 89 .bs_r_4 = generic_bs_r_4, 90 .bs_r_8 = bs_notimpl_bs_r_8, 91 92 /* read multiple */ 93 .bs_rm_1 = generic_bs_rm_1, 94 .bs_rm_2 = generic_armv4_bs_rm_2, 95 .bs_rm_4 = generic_bs_rm_4, 96 .bs_rm_8 = bs_notimpl_bs_rm_8, 97 98 /* read region */ 99 .bs_rr_1 = bs_notimpl_bs_rr_1, 100 .bs_rr_2 = generic_armv4_bs_rr_2, 101 .bs_rr_4 = generic_bs_rr_4, 102 .bs_rr_8 = bs_notimpl_bs_rr_8, 103 104 /* write (single) */ 105 .bs_w_1 = generic_bs_w_1, 106 .bs_w_2 = generic_armv4_bs_w_2, 107 .bs_w_4 = generic_bs_w_4, 108 .bs_w_8 = bs_notimpl_bs_w_8, 109 110 /* write multiple */ 111 .bs_wm_1 = generic_bs_wm_1, 112 .bs_wm_2 = generic_armv4_bs_wm_2, 113 .bs_wm_4 = generic_bs_wm_4, 114 .bs_wm_8 = bs_notimpl_bs_wm_8, 115 116 /* write region */ 117 .bs_wr_1 = bs_notimpl_bs_wr_1, 118 .bs_wr_2 = generic_armv4_bs_wr_2, 119 .bs_wr_4 = generic_bs_wr_4, 120 .bs_wr_8 = bs_notimpl_bs_wr_8, 121 122 /* set multiple */ 123 .bs_sm_1 = bs_notimpl_bs_sm_1, 124 .bs_sm_2 = bs_notimpl_bs_sm_2, 125 .bs_sm_4 = bs_notimpl_bs_sm_4, 126 .bs_sm_8 = bs_notimpl_bs_sm_8, 127 128 /* set region */ 129 .bs_sr_1 = bs_notimpl_bs_sr_1, 130 .bs_sr_2 = generic_armv4_bs_sr_2, 131 .bs_sr_4 = bs_notimpl_bs_sr_4, 132 .bs_sr_8 = bs_notimpl_bs_sr_8, 133 134 /* copy */ 135 .bs_c_1 = bs_notimpl_bs_c_1, 136 .bs_c_2 = generic_armv4_bs_c_2, 137 .bs_c_4 = bs_notimpl_bs_c_4, 138 .bs_c_8 = bs_notimpl_bs_c_8, 139 }; 140 141 void 142 footbridge_create_io_bs_tag( 143 struct bus_space *t, 144 void *cookie) 145 { 146 *t = footbridge_bs_tag; 147 t->bs_cookie = cookie; 148 t->bs_mmap = footbridge_io_bs_mmap; 149 } 150 151 void 152 footbridge_create_mem_bs_tag( 153 struct bus_space *t, 154 void *cookie) 155 { 156 *t = footbridge_bs_tag; 157 t->bs_map = footbridge_mem_bs_map; 158 t->bs_unmap = footbridge_mem_bs_unmap; 159 t->bs_mmap = footbridge_mem_bs_mmap; 160 t->bs_cookie = cookie; 161 } 162 163 /* bus space functions */ 164 165 int 166 footbridge_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int cacheable, bus_space_handle_t *bshp) 167 { 168 /* 169 * The whole 64K of PCI space is always completely mapped during 170 * boot. 171 * 172 * Eventually this function will do the mapping check overlapping / 173 * multiple mappings. 174 */ 175 176 /* The cookie is the base address for the I/O area */ 177 *bshp = bpa + (bus_addr_t)t; 178 return(0); 179 } 180 181 int 182 footbridge_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags, 183 bus_space_handle_t *bshp) 184 { 185 paddr_t startpa, endpa, pa; 186 const struct pmap_devmap *pd; 187 188 /* Round the allocation to page boundaries */ 189 startpa = trunc_page(bpa); 190 endpa = round_page(bpa + size); 191 192 /* 193 * Check for mappings below 1MB as we have this space already 194 * mapped. In practice it is only the VGA hole that takes 195 * advantage of this. 196 */ 197 if (endpa < DC21285_PCI_ISA_MEM_VSIZE) { 198 /* Store the bus space handle */ 199 *bshp = DC21285_PCI_ISA_MEM_VBASE + bpa; 200 return 0; 201 } 202 203 pa = bpa; 204 if ((pd = pmap_devmap_find_pa(pa, size)) != NULL) { 205 /* Device was statically mapped. */ 206 *bshp = pd->pd_va + (pa - pd->pd_pa); 207 return 0; 208 } 209 210 /* 211 * Eventually this function will do the mapping check for overlapping / 212 * multiple mappings 213 */ 214 215 vaddr_t va = uvm_km_alloc(kernel_map, endpa - startpa, 0, 216 UVM_KMF_VAONLY | UVM_KMF_NOWAIT); 217 if (va == 0) 218 return ENOMEM; 219 220 /* Store the bus space handle */ 221 *bshp = va + (bpa & PGOFSET); 222 223 /* Now map the pages */ 224 /* The cookie is the physical base address for the I/O area */ 225 const int pmapflags = 226 (flags & (BUS_SPACE_MAP_CACHEABLE|BUS_SPACE_MAP_PREFETCHABLE)) 227 ? 0 228 : PMAP_NOCACHE; 229 230 for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) { 231 pmap_kenter_pa(va, (bus_addr_t)t + pa, 232 VM_PROT_READ | VM_PROT_WRITE, pmapflags); 233 } 234 pmap_update(pmap_kernel()); 235 236 /* if (bpa >= DC21285_PCI_MEM_VSIZE && bpa != DC21285_ARMCSR_VBASE) 237 panic("footbridge_bs_map: Address out of range (%08lx)", bpa); 238 */ 239 return(0); 240 } 241 242 int 243 footbridge_bs_alloc( 244 void *t, 245 bus_addr_t rstart, 246 bus_addr_t rend, 247 bus_size_t size, 248 bus_size_t alignment, 249 bus_size_t boundary, 250 int cacheable, 251 bus_addr_t *bpap, 252 bus_space_handle_t *bshp) 253 { 254 panic("footbridge_alloc(): Help!"); 255 } 256 257 258 void 259 footbridge_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size) 260 { 261 /* 262 * Temporary implementation 263 */ 264 } 265 266 void 267 footbridge_mem_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size) 268 { 269 vaddr_t startva, endva; 270 271 /* 272 * Check for mappings below 1MB as we have this space permenantly 273 * mapped. In practice it is only the VGA hole that takes 274 * advantage of this. 275 */ 276 if (bsh >= DC21285_PCI_ISA_MEM_VBASE 277 && bsh < (DC21285_PCI_ISA_MEM_VBASE + DC21285_PCI_ISA_MEM_VSIZE)) { 278 return; 279 } 280 281 startva = trunc_page(bsh); 282 endva = round_page(bsh + size); 283 284 pmap_kremove(startva, endva); 285 pmap_update(pmap_kernel()); 286 uvm_km_free(kernel_map, startva, endva - startva, UVM_KMF_VAONLY); 287 } 288 289 void 290 footbridge_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size) 291 { 292 293 panic("footbridge_free(): Help!"); 294 /* footbridge_bs_unmap() does all that we need to do. */ 295 /* footbridge_bs_unmap(t, bsh, size);*/ 296 } 297 298 int 299 footbridge_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp) 300 { 301 302 *nbshp = bsh + (offset << ((int)t)); 303 return (0); 304 } 305 306 void * 307 footbridge_bs_vaddr(void *t, bus_space_handle_t bsh) 308 { 309 310 return ((void *)bsh); 311 } 312 313 void 314 footbridge_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t len, int flags) 315 { 316 } 317 318 319 paddr_t 320 footbridge_io_bs_mmap(void *t, bus_addr_t addr, off_t offset, 321 int prot, int flags) 322 { 323 paddr_t pa; 324 325 /* allow mapping of IO space */ 326 if (addr >= DC21285_PCI_IO_SIZE || 327 addr >= DC21285_PCI_IO_SIZE - offset || 328 offset < 0 || 329 offset >= DC21285_PCI_IO_SIZE) 330 return -1; 331 332 pa = DC21285_PCI_IO_BASE + addr + offset; 333 334 return arm_btop(pa); 335 } 336 337 338 paddr_t 339 footbridge_mem_bs_mmap(void *t, bus_addr_t addr, off_t offset, 340 int prot, int flags) 341 { 342 paddr_t pa; 343 344 if (addr >= DC21285_PCI_MEM_SIZE 345 || offset < 0 346 || offset >= DC21285_PCI_MEM_SIZE 347 || addr >= DC21285_PCI_MEM_SIZE - offset) 348 return -1; 349 350 pa = DC21285_PCI_MEM_BASE + addr + offset; 351 352 return arm_btop(pa); 353 } 354
Indexes created Mon Oct 20 20:10:13 GMT 2025