| /src/external/bsd/tmux/dist/ |
| tty.c | 1473 const struct grid_cell *gcp; local
1549 gcp = tty_check_codeset(tty, &gc);
1552 (gcp->attr & GRID_ATTR_CHARSET) ||
1553 gcp->flags != last.flags ||
1554 gcp->attr != last.attr ||
1555 gcp->fg != last.fg ||
1556 gcp->bg != last.bg ||
1557 gcp->us != last.us ||
1558 gcp->link != last.link ||
1559 ux + width + gcp->data.width > nx |
2174 const struct grid_cell *gcp = ctx->cell; local
2369 const struct grid_cell *gcp; local
[all...] |
| screen-write.c | 339 screen_write_putc(struct screen_write_ctx *ctx, const struct grid_cell *gcp,
344 memcpy(&gc, gcp, sizeof gc);
393 u_int lines, int more, const struct grid_cell *gcp, const char *fmt, ...)
402 memcpy(&gc, gcp, sizeof gc);
482 screen_write_puts(struct screen_write_ctx *ctx, const struct grid_cell *gcp,
488 screen_write_vnputs(ctx, -1, gcp, fmt, ap);
495 const struct grid_cell *gcp, const char *fmt, ...)
500 screen_write_vnputs(ctx, maxlen, gcp, fmt, ap);
506 const struct grid_cell *gcp, const char *fmt, va_list ap)
515 memcpy(&gc, gcp, sizeof gc)
[all...] |
| screen-redraw.c | 1024 struct grid_cell gc, slgc, *gcp; local
1068 gcp = &slgc;
1070 gcp = &gc;
1071 tty_cell(tty, gcp, &grid_default_cell, NULL,
|
| /src/sys/arch/amiga/dev/ |
| grf_cv.c | 483 struct grf_cv_softc *gcp; local
492 gcp = &congrf;
493 gp = &gcp->gcs_sc;
497 gcp = device_private(self);
498 gp = &gcp->gcs_sc;
510 (char *) &gcp->gcs_isr - (char *) &gp->g_display);
513 gcp->gcs_isr.isr_ipl = CV_INT_NUM;
514 gcp->gcs_isr.isr_intr = cvintr;
515 gcp->gcs_isr.isr_arg = (void *)gp;
518 add_isr(&gcp->gcs_isr)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_display_types.h | 1018 u32 gcp; member in struct:intel_crtc_state::__anon4930
|
| intel_hdmi.c | 927 * Determine if default_phase=1 can be indicated in the GCP infoframe.
990 I915_WRITE(reg, crtc_state->infoframes.gcp);
1015 crtc_state->infoframes.gcp = I915_READ(reg);
1032 crtc_state->infoframes.gcp |= GCP_COLOR_INDICATION;
1037 crtc_state->infoframes.gcp |= GCP_DEFAULT_PHASE_ENABLE;
|
| intel_display.c | 12869 DRM_DEBUG_KMS("GCP: 0x%x\n", pipe_config->infoframes.gcp);
13711 PIPE_CONF_CHECK_X(infoframes.gcp);
|
