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    Searched refs:getCondCode (Results 1 - 17 of 17) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/Disassembler/
MSP430Disassembler.cpp 324 static MSP430CC::CondCodes getCondCode(unsigned Cond) {
353 MI.addOperand(MCOperand::createImm(getCondCode(Cond)));
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
R600ISelLowering.cpp 800 DAG.getCondCode(ISD::SETEQ));
810 DAG.getCondCode(ISD::SETEQ));
890 CC = DAG.getCondCode(InverseCC);
896 CC = DAG.getCondCode(SwapInvCC);
924 CC = DAG.getCondCode(CCSwapped);
932 CC = DAG.getCondCode(CCSwapped);
964 DAG.getCondCode(CCOpcode));
990 DAG.getCondCode(ISD::SETNE));
SIISelLowering.cpp 4705 DAG.getCondCode(CCOpcode));
4735 Src1, DAG.getCondCode(CCOpcode));
4775 DAG.getConstant(0, SL, MVT::i32), DAG.getCondCode(ISD::SETNE));
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
SelectionDAG.h 778 SDValue getCondCode(ISD::CondCode Cond);
1062 {VT, MVT::Other}, {Chain, LHS, RHS, getCondCode(Cond)});
1063 return getNode(ISD::SETCC, DL, VT, LHS, RHS, getCondCode(Cond));
1083 False, getCondCode(Cond));
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
LegalizeFloatTypes.cpp 911 DAG.getCondCode(CCCode), NewLHS, NewRHS,
996 DAG.getCondCode(CCCode)),
1018 NewRHS, DAG.getCondCode(CCCode));
1021 DAG.getCondCode(CCCode)), 0);
1856 DAG.getCondCode(CCCode), NewLHS, NewRHS,
1941 DAG.getCondCode(CCCode)), 0);
LegalizeIntegerTypes.cpp 4312 LHSHi, RHSHi, DAG.getCondCode(CCCode));
4368 DAG.getCondCode(CCCode));
4397 DAG.getCondCode(CCCode), NewLHS, NewRHS,
4416 DAG.getCondCode(CCCode)), 0);
4433 DAG.UpdateNodeOperands(N, NewLHS, NewRHS, DAG.getCondCode(CCCode)), 0);
LegalizeDAG.cpp 3565 DAG.getCondCode(ISD::SETNE), Tmp3,
3696 CC = DAG.getCondCode(ISD::SETNE);
3728 Tmp4 = DAG.getCondCode(NeedInvert ? ISD::SETEQ : ISD::SETNE);
TargetLowering.cpp 8801 CC = DAG.getCondCode(InvCC);
8814 CC = DAG.getCondCode(InvCC);
SelectionDAG.cpp 1738 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
SelectionDAGBuilder.cpp 7260 Opers.push_back(DAG.getCondCode(Condition));
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp 944 ARMCC::CondCodes getCondCode() const {
2419 ARMCC::CondCodes CC = getCondCode();
2426 ARMCC::CondCodes CC = getCondCode();
2433 ARMCC::CondCodes CC = getCondCode();
2441 ARMCC::CondCodes CC = getCondCode();
2448 ARMCC::CondCodes CC = getCondCode();
2475 Inst.addOperand(MCOperand::createImm(unsigned(getCondCode())));
2476 unsigned RegNum = getCondCode() == ARMCC::AL ? 0: ARM::CPSR;
2526 Inst.addOperand(MCOperand::createImm(unsigned(getCondCode())));
2531 Inst.addOperand(MCOperand::createImm(unsigned(ARMCC::getOppositeCondition(getCondCode()))));
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/
AArch64AsmParser.cpp 548 AArch64CC::CondCode getCondCode() const {
1622 Inst.addOperand(MCOperand::createImm(getCondCode()));
2099 OS << "<condcode " << getCondCode() << ">";
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelLowering.cpp 2728 SDValue TargetCC = DAG.getCondCode(CCVal);
2735 DAG.getCondCode(ISD::SETNE), Op.getOperand(2));
3091 DAG.getCondCode(ISD::SETNE), Mask, VL);
3402 DAG.getCondCode(ISD::SETEQ), Mask, VL);
5820 N->getOperand(0), LHS, RHS, DAG.getCondCode(CCVal),
5838 SDValue TargetCC = DAG.getCondCode(CCVal);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 13782 N->getOperand(2), Splat, DAG.getCondCode(CC));
14064 N->getOperand(3), DAG.getCondCode(ISD::SETUGE));
14070 N->getOperand(3), DAG.getCondCode(ISD::SETUGT));
14076 N->getOperand(3), DAG.getCondCode(ISD::SETGE));
14082 N->getOperand(3), DAG.getCondCode(ISD::SETGT));
14088 N->getOperand(3), DAG.getCondCode(ISD::SETEQ));
14094 N->getOperand(3), DAG.getCondCode(ISD::SETNE));
15399 SetCC.getOperand(2) == DAG.getCondCode(ISD::SETGT)) {
17395 {Pg, Op1, Op2, DAG.getCondCode(ISD::SETNE)});
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 6467 DAG.getCondCode(ISD::SETEQ));
8767 DAG.getCondCode(ISD::SETNE));
9817 DAG.getCondCode(CC));
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp 3458 DAG.getCondCode(CC));
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp 22761 SDValue CC = DAG.getCondCode(Cond);
    [all...]

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