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    Searched refs:getConstantOperandVal (Results 1 - 25 of 32) sorted by relevancy

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  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelDAGToDAG.cpp 415 uint64_t Mask = N0.getConstantOperandVal(1);
434 unsigned IntNo = Node->getConstantOperandVal(0);
634 RISCVVType::decodeVSEW(Node->getConstantOperandVal(Offset) & 0x7);
636 Node->getConstantOperandVal(Offset + 1) & 0x7);
1046 auto Idx = Node->getConstantOperandVal(2);
1098 auto Idx = Node->getConstantOperandVal(1);
1317 uint64_t VC1 = N->getConstantOperandVal(1);
1318 uint64_t VC2 = Shl.getConstantOperandVal(1);
1490 uint64_t Offset2 = N->getConstantOperandVal(OffsetOpIdx);
RISCVISelLowering.cpp 1472 Op.getConstantOperandVal(I) == I);
2962 Hi.getConstantOperandVal(1) == 31)
3254 unsigned IntNo = Op.getConstantOperandVal(HasChain ? 1 : 0);
3320 unsigned IntNo = Op.getConstantOperandVal(0);
3674 unsigned OrigIdx = Op.getConstantOperandVal(2);
3823 unsigned OrigIdx = Op.getConstantOperandVal(1);
3949 uint64_t StepValImm = Op.getConstantOperandVal(0);
5129 Mask = Op.getConstantOperandVal(1);
5138 uint64_t ShAmt = Op.getConstantOperandVal(1);
5160 Mask = Src.getConstantOperandVal(1)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelDAGToDAG.cpp 423 uint64_t Index = N->getConstantOperandVal(1);
431 uint64_t Index = N->getConstantOperandVal(2);
1231 if (N->getConstantOperandVal(1))
1287 if (N->getConstantOperandVal(2))
1372 N0.getConstantOperandVal(1) != X86::sub_8bit)
1502 unsigned SubRegIdx = N->getConstantOperandVal(2);
1845 int ScaleLog = 8 - Shift.getConstantOperandVal(1);
1913 unsigned ShiftAmt = Shift.getConstantOperandVal(1);
1980 unsigned ShiftAmt = Shift.getConstantOperandVal(1);
2077 unsigned ShiftAmt = Shift.getConstantOperandVal(1)
    [all...]
X86ISelLowering.cpp 6157 unsigned IdxVal = Op.getConstantOperandVal(2);
6766 unsigned BaseIdx = Op.getConstantOperandVal(2);
6786 unsigned BaseIdx = Op.getConstantOperandVal(1);
6991 ImmN = N->getConstantOperandVal(N->getNumOperands() - 1);
6998 ImmN = N->getConstantOperandVal(N->getNumOperands() - 1);
7005 ImmN = N->getConstantOperandVal(N->getNumOperands() - 1);
7013 int BitLen = N->getConstantOperandVal(1);
7014 int BitIdx = N->getConstantOperandVal(2);
7024 int BitLen = N->getConstantOperandVal(2);
7025 int BitIdx = N->getConstantOperandVal(3)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelDAGToDAG.cpp 1463 unsigned RotAmt = V.getConstantOperandVal(1);
1476 unsigned ShiftAmt = V.getConstantOperandVal(1);
1492 unsigned ShiftAmt = V.getConstantOperandVal(1);
1507 uint64_t Mask = V.getConstantOperandVal(1);
2867 assert(LoweredLogical.getConstantOperandVal(1) == 1 &&
4641 switch (N.getConstantOperandVal(0)) {
4680 switch (CmpLHS.getConstantOperandVal(1)) {
4993 switch (N->getConstantOperandVal(0)) {
5740 int Elt = N->getConstantOperandVal(0);
5741 int EltSize = N->getConstantOperandVal(1)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonISelDAGToDAG.cpp 1751 Val.getConstantOperandVal(1) > MaxAmount)
1778 Val.getConstantOperandVal(1) > 127)
1797 uint64_t MulFactor = 1ull << N->getConstantOperandVal(1);
1819 return (unsigned) Val.getConstantOperandVal(1);
1831 V.getConstantOperandVal(i) % (1ULL << Amount) == 0) {
1832 uint64_t NewConst = V.getConstantOperandVal(i) >> Amount;
1836 return (Amount == V.getConstantOperandVal(1));
1847 V.getConstantOperandVal(i) % ((uint64_t)1 << Power) == 0) {
1848 uint64_t NewConst = V.getConstantOperandVal(i) >> Power;
1857 uint64_t ShiftAmount = V.getConstantOperandVal(1)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
M68kISelLowering.cpp 1718 unsigned ShAmt = Op->getConstantOperandVal(1);
1931 M68k::CondCode CCode = (M68k::CondCode)Op0.getConstantOperandVal(0);
2381 (M68k::CondCode)Cond.getOperand(0).getConstantOperandVal(0);
2399 (M68k::CondCode)Cond.getOperand(1).getConstantOperandVal(0);
2412 (M68k::CondCode)Cond.getOperand(0).getConstantOperandVal(0);
3264 if (Carry.getConstantOperandVal(0) == M68k::COND_CS)
3290 M68k::CondCode CC = M68k::CondCode(N->getConstantOperandVal(0));
3302 M68k::CondCode CC = M68k::CondCode(N->getConstantOperandVal(2));
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
SelectionDAGNodes.h 204 inline uint64_t getConstantOperandVal(unsigned i) const;
891 inline uint64_t getConstantOperandVal(unsigned Num) const;
1125 inline uint64_t SDValue::getConstantOperandVal(unsigned i) const {
1126 return Node->getConstantOperandVal(i);
1567 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
LegalizeVectorOps.cpp 470 unsigned Scale = Node->getConstantOperandVal(2);
1424 N->getOperand(0), N->getOperand(1), N->getConstantOperandVal(2), DAG))
LegalizeTypesGeneric.cpp 295 const unsigned Align = N->getConstantOperandVal(3);
SelectionDAG.cpp 2105 const MaybeAlign MA(Node->getConstantOperandVal(3));
2556 uint64_t Idx = V.getConstantOperandVal(1);
2879 uint64_t Idx = Op.getConstantOperandVal(2);
2904 uint64_t Idx = Op.getConstantOperandVal(1);
3393 const unsigned Index = Op.getConstantOperandVal(1);
4031 const int rIndex = Items - 1 - Op.getConstantOperandVal(1);
4100 uint64_t Idx = Op.getConstantOperandVal(1);
4128 uint64_t Idx = Op.getConstantOperandVal(2);
4514 Op.getConstantOperandVal(1) != IdentityIndex) {
4983 Operand.getConstantOperandVal(1) == 0 &
    [all...]
DAGCombiner.cpp 7322 uint64_t ShiftAmtC = WideVal.getConstantOperandVal(1);
14606 const bool NIsTrunc = N->getConstantOperandVal(1) == 1;
14607 const bool N0IsTrunc = N0.getConstantOperandVal(1) == 1;
14667 && N0.getConstantOperandVal(1) == 1) {
16249 Shift = User->getConstantOperandVal(1);
18336 unsigned OtherElt = InVec.getConstantOperandVal(2);
18996 uint64_t ShiftAmt = In.getNode()->getConstantOperandVal(1);
19106 unsigned ExtIndex = N->getOperand(i).getConstantOperandVal(1);
19184 ShufMask[i] = Extract.getConstantOperandVal(1);
19300 unsigned Index = N->getOperand(i).getConstantOperandVal(1)
    [all...]
InstrEmitter.cpp 914 CC = Node->getConstantOperandVal(PatchPointOpers::CCPos);
LegalizeIntegerTypes.cpp 968 unsigned Scale = N->getConstantOperandVal(2);
1430 N->getConstantOperandVal(3));
3407 uint64_t Scale = N->getConstantOperandVal(2);
3619 N->getConstantOperandVal(2), DAG);
3623 N->getConstantOperandVal(2), TLI, DAG);
LegalizeDAG.cpp 1152 unsigned Scale = Node->getConstantOperandVal(2);
3394 Node->getConstantOperandVal(2),
4471 Node->getConstantOperandVal(3));
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIISelLowering.cpp 5001 (SetCC->getConstantOperandVal(1) == 1 &&
6615 Op.getConstantOperandVal(2) == 0 &&
6616 Op.getConstantOperandVal(3) == ICmpInst::Predicate::ICMP_NE)
6819 unsigned IndexOperand = M->getConstantOperandVal(7);
6820 unsigned WaveRelease = M->getConstantOperandVal(8);
6821 unsigned WaveDone = M->getConstantOperandVal(9);
9069 Sel = (LHS.getConstantOperandVal(2) & Sel) | (~Sel & 0x0c0c0c0c);
9236 uint32_t Sel = getConstantPermuteMask(N->getConstantOperandVal(1));
9240 Sel |= LHS.getConstantOperandVal(2);
10702 LHS.getConstantOperandVal(1) != LHS.getConstantOperandVal(2) &
    [all...]
AMDGPUISelDAGToDAG.cpp 936 BaseLo.getConstantOperandVal(1) == 0 &&
939 BaseHi.getConstantOperandVal(1) == 1) {
2510 ImmOffset = BaseOffset.getConstantOperandVal(1);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsSEISelDAGToDAG.cpp 979 uint64_t Pos = Node->getConstantOperandVal(1);
980 uint64_t Size = Node->getConstantOperandVal(2);
MipsSEISelLowering.cpp 1614 if (Op->getConstantOperandVal(3) >= EltTy.getSizeInBits())
1617 Op->getConstantOperandVal(3) + 1);
1629 if (Op->getConstantOperandVal(3) >= EltTy.getSizeInBits())
1632 Op->getConstantOperandVal(3) + 1);
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyISelLowering.cpp 1380 if (Op.getConstantOperandVal(0) > 0)
1716 Index->getConstantOperandVal(1) != I)
1857 Mask[I] = Lane->getConstantOperandVal(1) * Scale1;
1859 Mask[I] = DestLaneCount + Lane->getConstantOperandVal(1) * Scale2;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 3769 if (InOp.getConstantOperandVal(0) == Intrinsic::aarch64_sve_ptrue)
4022 assert(Op.getConstantOperandVal(3) <= Ty.getScalarSizeInBits());
6650 isPowerOf2_64(LHS.getConstantOperandVal(1))) {
6652 uint64_t Mask = LHS.getConstantOperandVal(1);
6666 isPowerOf2_64(LHS.getConstantOperandVal(1))) {
6668 uint64_t Mask = LHS.getConstantOperandVal(1);
7445 MaybeAlign Align(Op.getConstantOperandVal(3));
8960 unsigned ExtIdx = Extract.getConstantOperandVal(1);
8987 Lane += V.getConstantOperandVal(1);
9846 uint64_t Val = N->getConstantOperandVal(1)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 7285 BV.getOperand(0).getOperand(0).getConstantOperandVal(1) != 0)
7289 BV.getOperand(1).getOperand(0).getConstantOperandVal(1) != 0)
7302 Trunc.getOperand(0).getConstantOperandVal(1) == Idx;
7340 int Offset = BV.getOperand(0).getOperand(0).getConstantOperandVal(1);
7350 Trunc.getOperand(0).getConstantOperandVal(1) == Idx;
7455 unsigned N = Op1.getConstantOperandVal(1);
7464 OpI.getConstantOperandVal(1) != I * N)
13619 return (ARMCC::CondCodes)N->getConstantOperandVal(2);
13621 return (ARMCC::CondCodes)N->getConstantOperandVal(1);
13994 unsigned Offset = InDouble.getConstantOperandVal(1) == 1 ? 2 : 0
    [all...]
ARMISelDAGToDAG.cpp 1050 MemN->getConstantOperandVal(MemN->getNumOperands() - 1) == 1)) {
3064 unsigned Lane1 = Ins1.getConstantOperandVal(2);
3065 unsigned Lane2 = Ins2.getConstantOperandVal(2);
3087 unsigned ExtractLane1 = Val1.getConstantOperandVal(1);
3088 unsigned ExtractLane2 = Val2.getConstantOperandVal(1);
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/
VEISelLowering.cpp 1459 MaybeAlign Alignment(Op.getConstantOperandVal(2));
1545 unsigned Depth = Op.getConstantOperandVal(0);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
SparcISelLowering.cpp 2658 uint64_t depth = Op.getConstantOperandVal(0);
2676 uint64_t depth = Op.getConstantOperandVal(0);

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