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    Searched refs:getFeatureBits (Results 1 - 25 of 85) sorted by relevancy

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  /src/external/apache2/llvm/dist/llvm/lib/MC/
MCInstrInfo.cpp 21 STI.getFeatureBits()[DeprecatedFeatures[Opcode]]) {
MCInstPrinter.cpp 69 return STI->getFeatureBits().test(C.Value);
71 return !STI->getFeatureBits().test(C.Value);
76 OrPredicateResult |= STI->getFeatureBits().test(C.Value);
80 OrPredicateResult |= !(STI->getFeatureBits().test(C.Value));
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/
AMDGPUMCAsmInfo.cpp 63 if (STI->getFeatureBits()[AMDGPU::FeatureNSAEncoding])
67 if (STI->getFeatureBits()[AMDGPU::FeatureVOP3Literal])
R600MCCodeEmitter.cpp 96 computeAvailableFeatures(STI.getFeatureBits()));
108 if (!(STI.getFeatureBits()[R600::FeatureCaymanISA])) {
141 if ((STI.getFeatureBits()[R600::FeatureR600ALUInst]) &&
SIMCCodeEmitter.cpp 135 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm])
171 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm])
207 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm])
265 if (!isUInt<16>(Imm) && STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal])
304 computeAvailableFeatures(STI.getFeatureBits()));
340 if ((bytes > 8 && STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal]) ||
341 (bytes > 4 && !STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal]))
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/MCTargetDesc/
RISCVAsmBackend.h 38 STI.getTargetTriple(), STI.getFeatureBits(), Options.getABIName());
39 RISCVFeatures::validate(STI.getTargetTriple(), STI.getFeatureBits());
49 return ForceRelocs || STI.getFeatureBits()[RISCV::FeatureRelax];
RISCVAsmBackend.cpp 114 return STI.getFeatureBits()[RISCV::FeatureRelax] || ForceRelocs;
204 bool HasStdExtC = STI.getFeatureBits()[RISCV::FeatureStdExtC];
420 if (!STI.getFeatureBits()[RISCV::FeatureRelax])
423 bool HasStdExtC = STI.getFeatureBits()[RISCV::FeatureStdExtC];
443 if (!STI.getFeatureBits()[RISCV::FeatureRelax])
RISCVMCCodeEmitter.cpp 175 if (STI.getFeatureBits()[RISCV::FeatureRelax]) {
194 computeAvailableFeatures(STI.getFeatureBits()));
269 bool EnableRelax = STI.getFeatureBits()[RISCV::FeatureRelax];
RISCVELFStreamer.cpp 31 const FeatureBitset &Features = STI.getFeatureBits();
RISCVInstPrinter.cpp 128 if (SysReg && SysReg->haveRequiredFeatures(STI.getFeatureBits()))
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Utils/
AMDGPUBaseInfo.cpp 326 if (!STI.getFeatureBits().test(FeatureSupportsXNACK))
328 if (!STI.getFeatureBits().test(FeatureSupportsSRAMECC))
518 if (STI->getFeatureBits().test(FeatureWavefrontSize16))
520 if (STI->getFeatureBits().test(FeatureWavefrontSize32))
527 if (STI->getFeatureBits().test(FeatureLocalMemorySize32768))
529 if (STI->getFeatureBits().test(FeatureLocalMemorySize65536))
539 if (isGFX10Plus(*STI) && STI->getFeatureBits().test(FeatureCuMode))
612 if (STI->getFeatureBits().test(FeatureSGPRInitBug))
634 if (STI->getFeatureBits().test(FeatureTrapHandler))
651 if (STI->getFeatureBits().test(FeatureTrapHandler)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVSubtarget.cpp 71 TargetABI = RISCVABI::computeTargetABI(TT, getFeatureBits(), ABIName);
72 RISCVFeatures::validate(TT, getFeatureBits());
RISCVAsmPrinter.cpp 172 NewSTI.setFeatureBits(MF.getSubtarget().getFeatureBits());
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyTargetTransformInfo.cpp 109 TM.getSubtargetImpl(*Caller)->getFeatureBits();
111 TM.getSubtargetImpl(*Callee)->getFeatureBits();
WebAssemblyTargetMachine.cpp 230 ->getFeatureBits();
232 Features |= WasmTM->getSubtargetImpl(F)->getFeatureBits();
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/AsmParser/
RISCVAsmParser.cpp 174 if (!(getSTI().getFeatureBits()[Feature])) {
181 bool getFeatureBits(uint64_t Feature) {
182 return getSTI().getFeatureBits()[Feature];
186 if (getSTI().getFeatureBits()[Feature]) {
196 FeatureBitStack.push_back(getSTI().getFeatureBits());
235 setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
239 !getSTI().getFeatureBits()[RISCV::FeatureStdExtF]) {
244 !getSTI().getFeatureBits()[RISCV::FeatureStdExtD]) {
998 FeatureBitset FBS = ComputeAvailableFeatures(getSTI().getFeatureBits());
1322 if (!SysReg->haveRequiredFeatures(getSTI().getFeatureBits())) {
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Disassembler/
AMDGPUDisassembler.cpp 48 if (!STI.getFeatureBits()[AMDGPU::FeatureGCN3Encoding] && !isGFX10Plus())
434 if (STI.getFeatureBits()[AMDGPU::FeatureGFX10_BEncoding]) {
464 if (STI.getFeatureBits()[AMDGPU::FeatureUnpackedD16VMem]) {
473 if (STI.getFeatureBits()[AMDGPU::FeatureFmaMixInsts]) {
495 if (STI.getFeatureBits()[AMDGPU::FeatureGFX90AInsts]) {
501 if (STI.getFeatureBits()[AMDGPU::FeatureGFX10_BEncoding]) {
512 if (STI.getFeatureBits()[AMDGPU::FeatureGFX90AInsts]) {
565 (STI.getFeatureBits()[AMDGPU::FeatureGFX90AInsts])) {
637 if (STI.getFeatureBits()[AMDGPU::FeatureGFX9] ||
638 STI.getFeatureBits()[AMDGPU::FeatureGFX10])
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/
ARMAsmBackend.h 38 bool hasNOP() const { return STI.getFeatureBits()[ARM::HasV6T2Ops]; }
ARMMCTargetDesc.cpp 41 if (STI.getFeatureBits()[llvm::ARM::HasV7Ops] &&
68 if (STI.getFeatureBits()[llvm::ARM::HasV7Ops] &&
80 if (STI.getFeatureBits()[llvm::ARM::HasV7Ops] &&
92 if (STI.getFeatureBits()[llvm::ARM::HasV8Ops] && MI.getOperand(1).isImm() &&
104 assert(!STI.getFeatureBits()[llvm::ARM::ModeThumb] &&
120 assert(!STI.getFeatureBits()[llvm::ARM::ModeThumb] &&
448 return STI.getFeatureBits()[ARM::FeatureCoprocCDE0 + Coproc];
ARMAsmBackend.cpp 209 bool HasThumb2 = STI.getFeatureBits()[ARM::FeatureThumb2];
210 bool HasV8MBaselineOps = STI.getFeatureBits()[ARM::HasV8MBaselineOps];
604 (!STI->getFeatureBits()[ARM::FeatureThumb2] &&
605 !STI->getFeatureBits()[ARM::HasV8MBaselineOps] &&
606 !STI->getFeatureBits()[ARM::HasV6MOps] &&
679 if (!STI->getFeatureBits()[ARM::FeatureThumb2] && IsResolved) {
704 if (!STI->getFeatureBits()[ARM::FeatureThumb2] &&
705 !STI->getFeatureBits()[ARM::HasV8MBaselineOps]) {
716 if (!STI->getFeatureBits()[ARM::FeatureThumb2]) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/MCTargetDesc/
AVRELFStreamer.cpp 63 EFlags |= getEFlagsForFeatureSet(STI.getFeatureBits());
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/
HexagonMCTargetDesc.cpp 338 if (STI->getFeatureBits()[F])
343 return STI->getFeatureBits()[F];
498 llvm::FeatureBitset Features = X->getFeatureBits();
502 X->setFeatureBits(completeHVXFeatures(X->getFeatureBits()));
510 llvm::FeatureBitset Features = X->getFeatureBits();
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/Disassembler/
RISCVDisassembler.cpp 67 .getFeatureBits();
440 if (!STI.getFeatureBits()[RISCV::Feature64Bit]) {
452 if (STI.getFeatureBits()[RISCV::FeatureExtZbproposedc] &&
453 STI.getFeatureBits()[RISCV::FeatureStdExtC]) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/MCTargetDesc/
VEMCCodeEmitter.cpp 91 computeAvailableFeatures(STI.getFeatureBits()));
  /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/X86/
Target.cpp 868 if (STI.getFeatureBits()[X86::FeatureAVX512])
870 if (STI.getFeatureBits()[X86::FeatureAVX])
875 if (STI.getFeatureBits()[X86::FeatureAVX512])
877 if (STI.getFeatureBits()[X86::FeatureAVX])
881 if (STI.getFeatureBits()[X86::FeatureAVX512])
894 STI.getFeatureBits()[X86::FeatureAVX] ? X86::VLDMXCSR : X86::LDMXCSR,

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