| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMCallLowering.cpp | 114 assert(VA.getLocReg() == PhysReg && "Assigning to the wrong reg?");
165 assignValueToReg(NewRegs[0], VA.getLocReg(), VA);
166 assignValueToReg(NewRegs[1], NextVA.getLocReg(), NextVA);
285 assert(VA.getLocReg() == PhysReg && "Assigning to the wrong reg?");
331 assignValueToReg(NewRegs[0], VA.getLocReg(), VA);
332 assignValueToReg(NewRegs[1], NextVA.getLocReg(), NextVA);
|
| ARMFastISel.cpp | 1977 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(Arg);
1978 RegArgs.push_back(VA.getLocReg());
1991 TII.get(ARM::VMOVRRD), VA.getLocReg())
1992 .addReg(NextVA.getLocReg(), RegState::Define)
1994 RegArgs.push_back(VA.getLocReg());
1995 RegArgs.push_back(NextVA.getLocReg());
2041 .addReg(RVLocs[0].getLocReg())
2042 .addReg(RVLocs[1].getLocReg()));
2044 UsedRegs.push_back(RVLocs[0].getLocReg());
2045 UsedRegs.push_back(RVLocs[1].getLocReg());
[all...] |
| ARMISelLowering.cpp | 2121 SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32,
2126 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32,
2140 Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag);
2144 Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag);
2154 Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(),
2206 RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd.getValue(id)));
2209 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1-id)));
2398 CSInfo.emplace_back(VA.getLocReg(), i);
2399 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
3054 DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| CallingConvLower.cpp | 77 for (MCRegAliasIterator AI(ValAssign.getLocReg(), &TRI, true);
235 Regs.push_back(MCPhysReg(Locs[I].getLocReg()));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 249 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part0, Flag);
251 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
253 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part1,
256 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Arg, Flag);
260 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
343 if (i+1 < RVLocs.size() && RVLocs[i+1].getLocReg() == VA.getLocReg()) {
351 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVal, Flag);
355 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
419 MF.getRegInfo().addLiveIn(VA.getLocReg(), VRegHi)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| ARCISelLowering.cpp | 285 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
380 DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getValVT(), Glue);
493 RegInfo.addLiveIn(VA.getLocReg(), VReg);
665 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);
670 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| BPFISelLowering.cpp | 334 RegInfo.addLiveIn(VA.getLocReg(), VReg);
442 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
530 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVals[i], Flag);
535 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
568 Chain = DAG.getCopyFromReg(Chain, DL, Val.getLocReg(),
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| CallLowering.cpp | 747 Handler.assignValueToReg(ArgReg, VA.getLocReg(), VA);
923 MCRegister PhysReg = ArgLoc.getLocReg();
1004 if (Loc1.getLocReg() != Loc2.getLocReg())
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| MipsCallLowering.cpp | 140 Register PhysReg = VA.getLocReg();
242 Register PhysReg = VA.getLocReg();
373 VA.getLocReg(), VA.getLocVT(), LocInfo);
|
| MipsFastISel.cpp | 1231 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg);
1232 CLI.OutRegs.push_back(VA.getLocReg());
1302 ResultReg).addReg(RVLocs[0].getLocReg());
1303 CLI.InRegs.push_back(RVLocs[0].getLocReg());
1728 Register DestReg = VA.getLocReg();
1769 RetRegs.push_back(VA.getLocReg());
|
| MipsISelLowering.cpp | 3294 Register LocRegLo = VA.getLocReg();
3336 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
3340 if (Mips::AFGR64RegClass.contains(VA.getLocReg()))
3346 CSInfo.emplace_back(VA.getLocReg(), i);
3498 SDValue Val = DAG.getCopyFromReg(Chain, DL, RVLocs[i].getLocReg(),
3665 Register ArgReg = VA.getLocReg();
3852 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Val, Flag);
3856 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.cpp | 464 RegInfo.addLiveIn(VA.getLocReg(), VReg);
557 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVals[i], Flag);
561 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
686 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
787 Chain = DAG.getCopyFromReg(Chain, DL, RVLocs[I].getLocReg(),
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| CallingConvLower.h | 150 Register getLocReg() const { assert(isRegLoc()); return Loc; }
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| AVRISelLowering.cpp | 1159 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
1313 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
1411 Chain = DAG.getCopyFromReg(Chain, dl, RVLoc.getLocReg(), RVLoc.getValVT(),
1467 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);
1471 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 654 RegInfo.addLiveIn(VA.getLocReg(), VReg);
764 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
770 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
849 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
947 Chain = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(),
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 1069 Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getValVT(),
1163 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
1313 RegInfo.addLiveIn(VA.getLocReg(), VReg);
1501 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);
1506 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86FastISel.cpp | 1240 if (VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1)
1270 Register DstReg = VA.getLocReg();
1279 RetRegs.push_back(VA.getLocReg());
3389 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg);
3390 OutRegs.push_back(VA.getLocReg());
3539 Register SrcReg = VA.getLocReg();
3558 InRegs.push_back(VA.getLocReg());
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| M68kISelLowering.cpp | 627 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
849 Chain = DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), CopyVT, InFlag)
900 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
1049 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), ValToCopy, Flag);
1051 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
1276 unsigned Reg = VA.getLocReg();
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 244 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), Val, Flag);
248 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
372 SDValue FR0 = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(),
386 RetVal = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(),
519 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
866 MRI.addLiveIn(VA.getLocReg(), VReg);
867 HFL.FirstVarArgSavedReg = NextSingleReg(*RC, VA.getLocReg());
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 4049 unsigned RegLo = MF.addLiveIn(VA.getLocReg(), RC);
4050 unsigned RegHi = MF.addLiveIn(ArgLocs[++i].getLocReg(), RC);
4058 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
5097 SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32,
5102 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32,
5111 VA.getLocReg(), VA.getLocVT(), InFlag);
5814 RegsToPass.push_back(std::make_pair(VA.getLocReg(), SVal.getValue(0)));
5817 RegsToPass.push_back(std::make_pair(ArgLocs[++i].getLocReg(),
5820 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
6930 MF.addLiveIn(VA.getLocReg(), getRegClassForSVT(SVT, IsPPC64))
[all...] |
| PPCFastISel.cpp | 1515 unsigned SourcePhysReg = VA.getLocReg();
1722 Register RetReg = VA.getLocReg();
1746 RetRegs.push_back(VA.getLocReg());
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| VEISelLowering.cpp | 376 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVal, Flag);
380 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
422 MF.addLiveIn(VA.getLocReg(), getRegClassFor(VA.getLocVT()));
675 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
756 unsigned Reg = VA.getLocReg();
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| AArch64FastISel.cpp | 3045 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg);
3046 CLI.OutRegs.push_back(VA.getLocReg());
3110 .addReg(RVLocs[0].getLocReg());
3111 CLI.InRegs.push_back(RVLocs[0].getLocReg());
3802 Register DestReg = VA.getLocReg();
3845 RetRegs.push_back(VA.getLocReg());
|
| AArch64ISelLowering.cpp | 4908 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
5225 SDValue Val = CopiedRegs.lookup(VA.getLocReg());
5228 DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), InFlag);
5231 CopiedRegs[VA.getLocReg()] = Val;
5741 if (RegsUsed.count(VA.getLocReg())) {
5749 return Elt.first == VA.getLocReg();
5757 return ArgReg.Reg == VA.getLocReg();
5760 RegsToPass.emplace_back(VA.getLocReg(), Arg);
5761 RegsUsed.insert(VA.getLocReg());
5764 CSInfo.emplace_back(VA.getLocReg(), i)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVISelLowering.cpp | 6993 RegInfo.addLiveIn(VA.getLocReg(), VReg);
7075 RegInfo.addLiveIn(VA.getLocReg(), LoVReg);
7078 if (VA.getLocReg() == RISCV::X17) {
7087 RegInfo.addLiveIn(VA.getLocReg() + 1, HiVReg);
7525 Register RegLo = VA.getLocReg();
7602 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue));
7714 DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), Glue);
7720 assert(VA.getLocReg() == ArgGPRs[0] && "Unexpected reg assignment");
7797 Register RegLo = VA.getLocReg();
7816 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Val, Glue)
[all...] |
