| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCCodeEmitter.cpp | 59 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
172 getMachineOpValue(const MCInst &MI, const MCOperand &MO,
186 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI);
187 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI);
196 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI);
197 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI);
206 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI);
207 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI);
208 uint64_t Index = getMachineOpValue(MI, MI.getOperand(OpNum + 2), Fixups, STI);
217 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCMCCodeEmitter.cpp | 49 return getMachineOpValue(MI, MO, Fixups, STI);
63 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
76 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
89 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
102 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI)
111 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
126 return getMachineOpValue(MI, MO, Fixups, STI);
155 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 16;
159 return (getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF) | RegBits;
173 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 14
[all...] |
| PPCMCCodeEmitter.h | 103 /// getMachineOpValue - Return binary encoding of operand. If the machine
105 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/VE/MCTargetDesc/ |
| VEMCCodeEmitter.cpp | 62 /// getMachineOpValue - Return binary encoding of operand. If the machine
64 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
99 unsigned VEMCCodeEmitter::getMachineOpValue(const MCInst &MI,
131 return getMachineOpValue(MI, MO, Fixups, STI);
144 static_cast<VECC::CondCode>(getMachineOpValue(MI, MO, Fixups, STI)));
154 getMachineOpValue(MI, MO, Fixups, STI)));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/MCTargetDesc/ |
| SparcMCCodeEmitter.cpp | 67 /// getMachineOpValue - Return binary encoding of operand. If the machine
69 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
118 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI);
127 getMachineOpValue(const MCInst &MI, const MCOperand &MO,
216 return getMachineOpValue(MI, MO, Fixups, STI);
229 return getMachineOpValue(MI, MO, Fixups, STI);
242 return getMachineOpValue(MI, MO, Fixups, STI);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 539 unsigned Res = getMachineOpValue(MI, MO, Fixups, STI);
731 /// getMachineOpValue - Return binary encoding of operand. If the machine
734 getMachineOpValue(const MCInst &MI, const MCOperand &MO,
759 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI)
761 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI);
775 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo),
777 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1),
789 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo),
791 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1),
803 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo)
[all...] |
| MipsMCCodeEmitter.h | 178 // getMachineOpValue - Return binary encoding of operand. If the machin
180 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| AMDGPUMCCodeEmitter.h | 42 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
|
| R600MCCodeEmitter.cpp | 46 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
164 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI,
|
| SIMCCodeEmitter.cpp | 49 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
334 OS.write((uint8_t)getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i),
389 return getMachineOpValue(MI, MO, Fixups, STI);
496 uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/ |
| LanaiMCCodeEmitter.cpp | 55 // getMachineOpValue - Return binary encoding of operand. If the machine
57 unsigned getMachineOpValue(const MCInst &Inst, const MCOperand &MCOp,
107 // getMachineOpValue - Return binary encoding of operand. If the machine
109 unsigned LanaiMCCodeEmitter::getMachineOpValue(
212 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo);
283 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo);
293 return getMachineOpValue(Inst, MCOp, Fixups, SubtargetInfo);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/MCTargetDesc/ |
| AVRMCCodeEmitter.h | 94 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
|
| AVRMCCodeEmitter.cpp | 250 unsigned AVRMCCodeEmitter::getMachineOpValue(const MCInst &MI,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/MCTargetDesc/ |
| CSKYMCCodeEmitter.cpp | 52 CSKYMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO,
|
| CSKYMCCodeEmitter.h | 43 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCCodeEmitter.h | 68 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
73 // helper routine for getMachineOpValue()
|
| HexagonMCCodeEmitter.cpp | 713 HexagonMCCodeEmitter::getMachineOpValue(MCInst const &MI, MCOperand const &MO,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/MCTargetDesc/ |
| BPFMCCodeEmitter.cpp | 52 // getMachineOpValue - Return binary encoding of operand. If the machin
54 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
87 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/MCTargetDesc/ |
| MSP430MCCodeEmitter.cpp | 53 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
101 unsigned MSP430MCCodeEmitter::getMachineOpValue(const MCInst &MI,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/MCTargetDesc/ |
| RISCVMCCodeEmitter.cpp | 71 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
237 RISCVMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64MCCodeEmitter.cpp | 60 /// getMachineOpValue - Return binary encoding of operand. If the machine
62 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
198 /// getMachineOpValue - Return binary encoding of operand. If the machine
201 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | 84 /// getMachineOpValue - Return binary encoding of operand. If the machine
86 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
549 /// getMachineOpValue - Return binary encoding of operand. If the machine
552 getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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