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    Searched refs:getNode (Results 1 - 25 of 190) sorted by relevancy

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  /src/external/apache2/llvm/dist/llvm/lib/BinaryFormat/
MsgPackDocument.cpp 31 return find(getDocument()->getNode(S));
37 return (*this)[getDocument()->getNode(S)];
53 return (*this)[getDocument()->getNode(Key)];
56 return (*this)[getDocument()->getNode(Key)];
59 return (*this)[getDocument()->getNode(Key)];
62 return (*this)[getDocument()->getNode(Key)];
80 *this = getDocument()->getNode(Val);
84 *this = getDocument()->getNode(Val);
88 *this = getDocument()->getNode(Val);
92 *this = getDocument()->getNode(Val)
    [all...]
MsgPackDocumentYAML.cpp 75 *this = getDocument()->getNode(uint64_t(0));
78 *this = getDocument()->getNode(int64_t(0));
85 *this = getDocument()->getNode();
89 *this = getDocument()->getNode(false);
95 *this = getDocument()->getNode(0.0);
104 *this = getDocument()->getNode(V, /*Copy=*/true);
116 ScalarDocNode N = getDocument()->getNode();
211 ScalarDocNode KeyObj = M.getDocument()->getNode();
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUISelLowering.cpp 572 const auto Flags = Op.getNode()->getFlags();
823 if (!allUsesHaveSourceMods(Op.getNode()))
1134 return DAG.getNode(AMDGPUISD::ENDPGM, DL, MVT::Other, Chain);
1166 for (SDNode::use_iterator U = DAG.getEntryNode().getNode()->use_begin(),
1167 UE = DAG.getEntryNode().getNode()->use_end();
1185 return DAG.getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
1322 SDValue Trap = DAG.getNode(ISD::TRAP, DL, MVT::Other, DAG.getEntryNode());
1323 SDValue OutputChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other,
1354 SDValue Lo = DAG.getNode(ISD::BITCAST, SL, MVT::i32, Op.getOperand(0));
1355 SDValue Hi = DAG.getNode(ISD::BITCAST, SL, MVT::i32, Op.getOperand(1))
    [all...]
AMDGPUHSAMetadataStreamer.cpp 605 Dims.push_back(Dims.getDocument()->getNode(
612 Version.push_back(Version.getDocument()->getNode(VersionMajorV3));
613 Version.push_back(Version.getDocument()->getNode(VersionMinorV3));
625 Printf.push_back(Printf.getDocument()->getNode(
640 Kern[".language"] = Kern.getDocument()->getNode("OpenCL C");
642 LanguageVersion.push_back(Kern.getDocument()->getNode(
644 LanguageVersion.push_back(Kern.getDocument()->getNode(
657 Kern[".vec_type_hint"] = Kern.getDocument()->getNode(
664 Kern[".device_enqueue_symbol"] = Kern.getDocument()->getNode(
751 Arg[".name"] = Arg.getDocument()->getNode(Name, /*Copy=*/true)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
DAGCombiner.cpp 333 AddToWorklist(Op.getNode());
396 // SDValue.getNode() == 0 - No change was made
397 // SDValue.getNode() == N - N was replaced, is dead and has been handled.
873 AddToWorklist(Op.getNode());
911 !TLI.isConstTrueVal(N.getOperand(2).getNode()) ||
912 !TLI.isConstFalseVal(N.getOperand(3).getNode()))
930 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()->hasOneUse())
988 ISD::isBuildVectorOfConstantFPSDNodes(V.getNode());
1068 return DAG.getNode(Opc, DL, VT, N0.getOperand(0), OpNode);
1074 SDValue OpNode = DAG.getNode(Opc, SDLoc(N0), VT, N0.getOperand(0), N1)
    [all...]
ResourcePriorityQueue.cpp 78 const SDNode *ScegN = PredSU->getNode();
116 const SDNode *ScegN = SuccSU->getNode();
135 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo());
244 if (!SU || !SU->getNode())
249 if (SU->getNode()->getGluedNode())
254 if (SU->getNode()->isMachineOpcode())
255 switch (SU->getNode()->getMachineOpcode()) {
258 SU->getNode()->getMachineOpcode())))
289 if (!isResourceAvailable(SU) || SU->getNode()->getGluedNode()) {
294 if (SU->getNode() && SU->getNode()->isMachineOpcode())
    [all...]
LegalizeDAG.cpp 222 UpdatedNodes->insert(New.getNode());
223 ReplacedNode(Old.getNode());
234 UpdatedNodes->insert(New[i].getNode());
245 UpdatedNodes->insert(New.getNode());
246 ReplacedNode(Old.getNode());
377 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
405 SDValue ScVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl,
480 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
498 if (SDNode *OptStore = OptimizeFloatStore(ST).getNode()) {
532 Value = DAG.getNode(ISD::BITCAST, dl, NVT, Value)
    [all...]
LegalizeTypesGeneric.cpp 58 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
59 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
69 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
70 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
77 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
78 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
83 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
84 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
96 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
97 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi)
    [all...]
LegalizeVectorOps.cpp 255 SDNode *Node = DAG.UpdateNodeOperands(Op.getNode(), Ops);
546 if (!Res.getNode())
615 Operands[j] = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(j));
617 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Node->getOperand(j));
623 DAG.getNode(Node->getOpcode(), dl, NVT, Operands, Node->getFlags());
628 Res = DAG.getNode(ISD::FP_ROUND, dl, VT, Res, DAG.getIntPtrConstant(0, dl));
630 Res = DAG.getNode(ISD::BITCAST, dl, VT, Res);
654 Operands[j] = DAG.getNode(Opc, dl, NVT, Node->getOperand(j));
660 SDValue Res = DAG.getNode(Node->getOpcode(), dl,
668 DAG.getNode(Node->getOpcode(), dl, Node->getValueType(0), Operands)
    [all...]
LegalizeIntegerTypes.cpp 236 if (Res.getNode())
249 return DAG.getNode(ISD::AssertSext, SDLoc(N),
256 return DAG.getNode(ISD::AssertZext, SDLoc(N),
349 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp));
353 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp));
356 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftPromotedHalf(InOp));
360 return DAG.getNode(ISD::FP_TO_FP16, dl, NOutVT, GetPromotedFloat(InOp));
369 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT,
386 InOp = DAG.getNode(ISD::ANY_EXTEND, dl,
390 return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp)
    [all...]
TargetLowering.cpp 434 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Call.second,
436 NewLHS = DAG.getNode(ShouldInvertCC ? ISD::AND : ISD::OR, dl,
512 return TLO.New.getNode();
533 SDValue NewOp = TLO.DAG.getNode(Opcode, DL, VT, Op.getOperand(0), NewC);
562 assert(Op.getNode()->getNumValues() == 1 &&
574 if (!Op.getNode()->hasOneUse())
589 SDValue X = DAG.getNode(
591 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(0)),
592 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(1)));
594 SDValue Z = DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(), X)
    [all...]
LegalizeVectorTypes.cpp 191 if (R.getNode())
198 return DAG.getNode(N->getOpcode(), SDLoc(N),
206 return DAG.getNode(N->getOpcode(), SDLoc(N), Op0.getValueType(), Op0, Op1,
214 return DAG.getNode(N->getOpcode(), SDLoc(N), Op0.getValueType(), Op0, Op1,
240 SDValue Result = DAG.getNode(N->getOpcode(), dl, DAG.getVTList(ValueVTs),
269 SDNode *ScalarNode = DAG.getNode(
270 N->getOpcode(), DL, ScalarVTs, ScalarLHS, ScalarRHS).getNode();
279 SDValue OtherVal = DAG.getNode(
300 return DAG.getNode(ISD::BITCAST, SDLoc(N),
310 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp)
    [all...]
SelectionDAGBuilder.cpp 204 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]);
205 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]);
211 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi);
225 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi);
227 DAG.getNode(ISD::SHL, DL, TotalVT, Hi,
230 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, TotalVT, Lo);
231 Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi);
238 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]);
239 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]);
242 Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi)
    [all...]
ScheduleDAGSDNodes.cpp 91 SUnit *SU = newSUnit(Old->getNode());
143 if (ExtraOper.getNode())
162 SDNode *GlueDestNode = Glue.getNode();
304 else if (!OutGlue && InGlue.getNode())
305 RemoveUnusedGlue(InGlue.getNode(), DAG);
345 Worklist.push_back(DAG->getRoot().getNode());
346 Visited.insert(DAG->getRoot().getNode());
354 if (Visited.insert(Op.getNode()).second)
355 Worklist.push_back(Op.getNode());
373 N = N->getOperand(N->getNumOperands()-1).getNode();
    [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
MachinePostDominators.h 47 return PDT->getNode(BB);
50 MachineDomTreeNode *getNode(MachineBasicBlock *BB) const {
51 return PDT->getNode(BB);
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZSelectionDAGInfo.cpp 41 return DAG.getNode(Loop, DL, MVT::Other, Chain, Dst, Src,
44 return DAG.getNode(Sequence, DL, MVT::Other, Chain, Dst, Src,
103 Dst = DAG.getNode(ISD::ADD, DL, PtrVT, Dst,
109 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chain1, Chain2);
118 SDValue Dst2 = DAG.getNode(ISD::ADD, DL, PtrVT, Dst,
122 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chain1, Chain2);
136 SDValue DstPlus1 = DAG.getNode(ISD::ADD, DL, PtrVT, Dst,
159 return DAG.getNode(SystemZISD::CLC_LOOP, DL, VTs, Chain, Src1, Src2,
162 return DAG.getNode(SystemZISD::CLC, DL, VTs, Chain, Src1, Src2,
172 SDValue IPM = DAG.getNode(SystemZISD::IPM, DL, MVT::i32, CCReg)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
XCoreISelLowering.cpp 214 case ISD::SUB: return ExpandADDSUB(Op.getNode(), DAG);
255 return DAG.getNode(XCoreISD::PCRelativeWrapper, dl, MVT::i32, GA);
260 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, GA);
262 return DAG.getNode(XCoreISD::DPRelativeWrapper, dl, MVT::i32, GA);
293 GA = DAG.getNode(ISD::ADD, DL, MVT::i32, GA, Remaining);
318 return DAG.getNode(XCoreISD::PCRelativeWrapper, DL, PtrVT, Result);
336 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, Res);
358 return DAG.getNode(XCoreISD::BR_JT, dl, MVT::Other, Chain, TargetJT, Index);
361 SDValue ScaledIndex = DAG.getNode(ISD::SHL, dl, MVT::i32, Index,
363 return DAG.getNode(XCoreISD::BR_JT32, dl, MVT::Other, Chain, TargetJT
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonISelLoweringHVX.cpp 319 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, ResTy, IntOps);
366 return DAG.getNode(ISD::CONCAT_VECTORS, dl, typeJoin(ty(Ops)),
434 return DAG.getNode(ISD::SHL, dl, MVT::i32,
450 SDValue SubIdx = DAG.getNode(ISD::AND, dl, MVT::i32, {Idx, Mask});
518 if (!SplatV.getNode())
526 assert(SplatV.getNode());
527 auto *IdxN = dyn_cast<ConstantSDNode>(SplatV.getNode());
531 SDValue S = DAG.getNode(ISD::SPLAT_VECTOR, dl, WordTy, SplatV);
569 if (Vec.getNode() != nullptr && T.getNode() != Vec.getNode()
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
MachineDominators.cpp 104 MachineDomTreeNode *SuccDTNode = DT->getNode(Succ);
127 if (!DT->dominates(SuccDTNode, DT->getNode(PredBB))) {
145 DT->changeImmediateDominator(DT->getNode(Edge.ToBB), NewDTNode);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
LanaiISelLowering.cpp 354 if (Result.getNode()) {
471 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue,
474 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue,
478 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue);
520 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Copy, Chain);
586 if (Flag.getNode())
590 return DAG.getNode(Opc, DL, MVT::Other,
667 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg);
670 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg);
673 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 2064 Val = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocVT.getSizeInBits()),
2067 Val = DAG.getNode(ARMISD::VMOVhr, dl, ValVT, Val);
2069 Val = DAG.getNode(ISD::TRUNCATE, dl,
2071 Val = DAG.getNode(ISD::BITCAST, dl, ValVT, Val);
2080 Val = DAG.getNode(ARMISD::VMOVrh, dl,
2083 Val = DAG.getNode(ISD::BITCAST, dl,
2085 Val = DAG.getNode(ISD::ZERO_EXTEND, dl,
2088 return DAG.getNode(ISD::BITCAST, dl, LocVT, Val);
2132 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi);
2135 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp 2440 return DAG.getNode(X86ISD::GlobalBaseReg, SDLoc(),
2626 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, Dl, ValLoc, ValArg,
2637 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, Dl, ValLoc, ValToCopy);
2648 return DAG.getNode(ISD::ANY_EXTEND, Dl, ValLoc, ValArg);
2667 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, Dl, MVT::i32, Arg,
2669 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, Dl, MVT::i32, Arg,
2714 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ValToCopy);
2716 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), ValToCopy);
2721 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ValToCopy);
2750 ValToCopy = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f80, ValToCopy)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
AVRISelLowering.cpp 275 const SDNode *N = Op.getNode();
287 return DAG.getNode(AVRISD::LSLLOOP, dl, VT, N->getOperand(0),
290 return DAG.getNode(AVRISD::LSRLOOP, dl, VT, N->getOperand(0),
295 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt,
297 return DAG.getNode(AVRISD::ROLLOOP, dl, VT, N->getOperand(0), Amt);
302 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt,
304 return DAG.getNode(AVRISD::RORLOOP, dl, VT, N->getOperand(0), Amt);
307 return DAG.getNode(AVRISD::ASRLOOP, dl, VT, N->getOperand(0),
341 Victim = DAG.getNode(AVRISD::SWAP, dl, VT, Victim);
343 DAG.getNode(ISD::AND, dl, VT, Victim, DAG.getConstant(0xf0, dl, VT))
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsSEISelLowering.cpp 419 SDValue Tmp = DAG.getNode(MipsISD::MTC1_D64, DL, MVT::f64, Op->getOperand(0));
420 return DAG.getNode(MipsISD::FSELECT, DL, ResTy, Tmp, Op->getOperand(1),
516 return DAG.getNode(MipsISD::VEXTRACT_ZEXT_ELT, SDLoc(Op0),
535 BuildVectorSDNode *Node = dyn_cast<BuildVectorSDNode>(N.getNode());
643 if (!IfClr.getNode() && isVSplat(Op0Op1, Mask, IsLittleEndian)) {
660 if (!IfClr.getNode()) {
697 if (!IfClr.getNode())
700 assert(Cond.getNode() && IfSet.getNode());
711 return DAG.getNode(ISD::VSELECT, SDLoc(N), Ty, Cond, IfSet, IfClr)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
SparcISelLowering.cpp 242 SDValue Part0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32,
245 SDValue Part1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32,
282 if (Flag.getNode())
285 return DAG.getNode(SPISD::RET_FLAG, DL, MVT::Other, RetOps);
323 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal);
326 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal);
329 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal);
338 OutVal = DAG.getNode(ISD::SHL, DL, MVT::i64, OutVal,
344 SDValue NV = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, OutVals[i+1]);
345 OutVal = DAG.getNode(ISD::OR, DL, MVT::i64, OutVal, NV)
    [all...]

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