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    Searched refs:getRegClassOrNull (Results 1 - 12 of 12) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
InstructionSelect.cpp 176 const TargetRegisterClass *DstRC = MRI.getRegClassOrNull(DstReg);
251 const TargetRegisterClass *RC = MRI.getRegClassOrNull(VReg);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
MIRVRegNamerUtils.cpp 169 const TargetRegisterClass *RC = MRI.getRegClassOrNull(VReg);
MIRCanonicalizerPass.cpp 329 if (!MRI.getRegClassOrNull(Dst))
TargetRegisterInfo.cpp 177 if (RegInfo.getRegClassOrNull(Reg))
MachineVerifier.cpp 980 if (MRI->getRegClassOrNull(Src) != MRI->getRegClassOrNull(Dst))
1919 const TargetRegisterClass *RC = MRI->getRegClassOrNull(Reg);
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
MachineRegisterInfo.h 633 /// \see getRegClassOrNull when this might happen.
651 const TargetRegisterClass *getRegClassOrNull(Register Reg) const {
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64RegisterBankInfo.cpp 882 auto Idx = MRI.getRegClassOrNull(Src) == &AArch64::XSeqPairsClassRegClass
AArch64InstructionSelector.cpp 3979 MRI.getRegClassOrNull(I.getOperand(1).getReg());
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
MVETPAndVPTOptimisationsPass.cpp 579 const TargetRegisterClass *RegClass = RegInfo.getRegClassOrNull(DstReg);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUInstructionSelector.cpp 166 if (!MRI->getRegClassOrNull(SrcReg))
440 if (!MRI->getRegClassOrNull(Dst1Reg))
1230 if (!MRI->getRegClassOrNull(Reg))
1782 if (!MRI->getRegClassOrNull(CCReg))
2460 if (!MRI->getRegClassOrNull(CondReg))
SIISelLowering.cpp 11806 const TargetRegisterClass *RC = MRI.getRegClassOrNull(Reg);
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86InstructionSelector.cpp 297 const TargetRegisterClass *OldRC = MRI.getRegClassOrNull(DstReg);
1454 if (!MRI.getRegClassOrNull(DstReg)) {

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