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Searched
refs:getShiftType
(Results
1 - 5
of
5
) sorted by relevancy
/src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64MCCodeEmitter.cpp
265
assert(AArch64_AM::
getShiftType
(MO1.getImm()) == AArch64_AM::LSL &&
525
assert(AArch64_AM::
getShiftType
(ShiftOpnd) == AArch64_AM::LSL &&
AArch64InstPrinter.cpp
983
if (AArch64_AM::
getShiftType
(Val) == AArch64_AM::LSL &&
986
O << ", " << AArch64_AM::getShiftExtendName(AArch64_AM::
getShiftType
(Val))
1575
assert(AArch64_AM::
getShiftType
(Shift) == AArch64_AM::LSL &&
AArch64AddressingModes.h
72
///
getShiftType
- Extract the shift type.
73
static inline AArch64_AM::ShiftExtendType
getShiftType
(unsigned Imm) {
/src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64InstrInfo.cpp
898
return AArch64_AM::
getShiftType
(Imm) == AArch64_AM::LSL && ShiftVal <= 5;
924
(AArch64_AM::
getShiftType
(Imm) == AArch64_AM::ASR && ShiftVal == 31);
932
(AArch64_AM::
getShiftType
(Imm) == AArch64_AM::ASR && ShiftVal == 63);
AArch64ISelDAGToDAG.cpp
2210
if (AArch64_AM::
getShiftType
(ShiftTypeAndValue) == AArch64_AM::LSL) {
2216
} else if (AArch64_AM::
getShiftType
(ShiftTypeAndValue) == AArch64_AM::LSR) {
Completed in 32 milliseconds
Indexes created Sat Jun 20 00:25:23 UTC 2026