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    Searched refs:getSimpleVT (Results 1 - 25 of 64) sorted by relevancy

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  /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
NVPTXISelDAGToDAG.cpp 885 MVT SimpleVT = LoadedVT.getSimpleVT();
1023 MVT SimpleVT = LoadedVT.getSimpleVT();
1076 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy,
1084 pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, NVPTX::LDV_i8_v4_avar,
1103 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy,
1111 pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, NVPTX::LDV_i8_v4_asi,
1132 EltVT.getSimpleVT().SimpleTy, NVPTX::LDV_i8_v2_ari_64,
1140 EltVT.getSimpleVT().SimpleTy, NVPTX::LDV_i8_v4_ari_64,
1151 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy,
1159 pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, NVPTX::LDV_i8_v4_ari
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  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ValueTypes.h 96 return getSimpleVT().changeVectorElementTypeToInteger();
106 return getSimpleVT().changeVectorElementType(EltVT.getSimpleVT());
119 return getSimpleVT().changeTypeToInteger();
281 MVT getSimpleVT() const {
TargetCallingConv.h 215 VT = vt.getSimpleVT();
254 VT = vt.getSimpleVT();
TargetLowering.h 549 MVT LoadMVT = LoadVT.getSimpleVT();
554 getTypeToPromoteTo(ISD::LOAD, LoadMVT) == BitcastVT.getSimpleVT())
891 (unsigned)VT.getSimpleVT().SimpleTy < array_lengthof(RegClassForVT));
892 return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != nullptr;
1046 return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op];
1223 unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy;
1224 unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy;
1248 unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy;
1249 unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy;
1279 (getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Legal |
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  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
FastISel.cpp 250 MVT VT = RealVT.getSimpleVT();
254 VT = TLI.getTypeToTransformTo(V->getContext(), VT).getSimpleVT();
313 Reg = fastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP,
396 IdxN = fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN);
399 fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, IdxN);
481 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, CI->getZExtValue(),
482 VT.getSimpleVT());
513 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, Imm,
514 VT.getSimpleVT());
528 Register ResultReg = fastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT()
    [all...]
LegalizeDAG.cpp 312 SVT = (MVT::SimpleValueType)(SVT.getSimpleVT().SimpleTy - 1);
849 SrcVT.getSimpleVT())) {
880 EVT LoadVT = TLI.getRegisterType(SrcVT.getSimpleVT());
904 EVT ILoadVT = TLI.getRegisterType(IDestVT.getSimpleVT());
2101 switch (InVT.getSimpleVT().SimpleTy) {
2463 switch (SrcVT.getSimpleVT().SimpleTy) {
2529 NewInTy = (MVT::SimpleValueType)(NewInTy.getSimpleVT().SimpleTy+1);
2587 NewOutTy = (MVT::SimpleValueType)(NewOutTy.getSimpleVT().SimpleTy+1);
2630 NewOutTy = (MVT::SimpleValueType)(NewOutTy.getSimpleVT().SimpleTy + 1);
3897 MVT VT = cast<AtomicSDNode>(Node)->getMemoryVT().getSimpleVT();
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  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMTargetTransformInfo.cpp 455 LoadConversionTbl, ISD, DstTy.getSimpleVT(), SrcTy.getSimpleVT()))
478 DstTy.getSimpleVT(), SrcTy.getSimpleVT()))
490 DstTy.getSimpleVT(), SrcTy.getSimpleVT()))
507 SrcTy.getSimpleVT(), DstTy.getSimpleVT()))
518 SrcTy.getSimpleVT(), DstTy.getSimpleVT()))
    [all...]
ARMFastISel.cpp 631 MVT VT = CEVT.getSimpleVT();
678 VT = evt.getSimpleVT();
1339 MVT SrcVT = SrcEVT.getSimpleVT();
1534 MVT SrcVT = SrcEVT.getSimpleVT();
1776 MVT VT = FPVT.getSimpleVT();
2123 MVT RVVT = RVEVT.getSimpleVT();
2187 return ARMMaterializeGV(GV, LCREVT.getSimpleVT());
2754 MVT SrcVT = SrcEVT.getSimpleVT();
2755 MVT DestVT = DestEVT.getSimpleVT();
3039 switch (ArgVT.getSimpleVT().SimpleTy)
    [all...]
ARMCallLowering.cpp 75 unsigned VTSize = VT.getSimpleVT().getSizeInBits();
  /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
MSP430ISelDAGToDAG.cpp 305 switch (VT.getSimpleVT().SimpleTy) {
330 MVT VT = LD->getMemoryVT().getSimpleVT();
359 MVT VT = LD->getMemoryVT().getSimpleVT();
  /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
AVRISelDAGToDAG.cpp 107 MVT VT = cast<MemSDNode>(Op)->getMemoryVT().getSimpleVT();
124 MVT VT = LD->getMemoryVT().getSimpleVT();
368 MVT VT = LD->getMemoryVT().getSimpleVT();
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsFastISel.cpp 452 MVT VT = CEVT.getSimpleVT();
600 VT = evt.getSimpleVT();
1371 switch (ArgVT.getSimpleVT().SimpleTy) {
1740 MVT RVVT = RVEVT.getSimpleVT();
1819 MVT SrcVT = SrcEVT.getSimpleVT();
1820 MVT DestVT = DestEVT.getSimpleVT();
1920 MVT DestVT = DestEVT.getSimpleVT();
1981 MVT Op0MVT = TLI.getValueType(DL, Op0->getType(), true).getSimpleVT();
2097 MVT VMVT = TLI.getValueType(DL, V->getType(), true).getSimpleVT();
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonISelLowering.h 386 return Op.getValueType().getSimpleVT();
389 return { Ops.first.getValueType().getSimpleVT(),
390 Ops.second.getValueType().getSimpleVT() };
HexagonISelDAGToDAG.cpp 81 switch (LoadedVT.getSimpleVT().SimpleTy) {
477 switch (StoredVT.getSimpleVT().SimpleTy) {
771 MVT ResTy = N->getValueType(0).getSimpleVT();
834 MVT OpTy = Op.getValueType().getSimpleVT();
841 MVT ResTy = N->getValueType(0).getSimpleVT();
849 MVT ResTy = N->getValueType(0).getSimpleVT();
858 MVT ResTy = N->getValueType(0).getSimpleVT();
860 MVT OpTy = N->getOperand(0).getValueType().getSimpleVT(); (void)OpTy;
872 MVT ResTy = N->getValueType(0).getSimpleVT();
1170 if (!OpVT.isSimple() || OpVT.getSimpleVT() != MVT::i1
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HexagonISelDAGToDAGHVX.cpp 673 : InpNode(Inp), InpTy(Inp->getValueType(0).getSimpleVT()) {}
989 MVT OpTy = Op.getValueType().getSimpleVT();
1442 MVT LegalTy = Lower.getTypeToTransformTo(Ctx, ElemTy).getSimpleVT();
2046 MVT ResTy = N->getValueType(0).getSimpleVT();
2118 MVT Ty = N->getValueType(0).getSimpleVT();
HexagonSubtarget.cpp 186 MVT ElemTy = Ty.getVectorElementType().getSimpleVT();
HexagonISelLoweringHVX.cpp 359 MVT CastTy = tyVector(Vec.getValueType().getSimpleVT(), ElemTy);
425 if (ElemIdx.getValueType().getSimpleVT() != MVT::i32)
1776 MVT Ty = typeSplit(N->getVT().getSimpleVT()).first;
1806 MVT MemTy = MemN->getMemoryVT().getSimpleVT();
2293 return Subtarget.isHVXVectorType(WideTy.getSimpleVT(), true);
2305 return Ty.isSimple() && Subtarget.isHVXVectorType(Ty.getSimpleVT(), true);
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCFastISel.cpp 275 VT = Evt.getSimpleVT();
825 MVT SrcVT = SrcEVT.getSimpleVT();
1075 MVT SrcVT = SrcEVT.getSimpleVT();
1752 MVT RVVT = RVEVT.getSimpleVT();
1916 MVT SrcVT = SrcEVT.getSimpleVT();
1917 MVT DestVT = DestEVT.getSimpleVT();
2255 MVT VT = CEVT.getSimpleVT();
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86FastISel.cpp 302 VT = evt.getSimpleVT();
499 switch (VT.getSimpleVT().SimpleTy) {
671 switch (VT.getSimpleVT().SimpleTy) {
710 unsigned RR = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc, Src);
1266 SrcReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Op, SrcReg);
1364 switch (VT.getSimpleVT().SimpleTy) {
1387 switch (VT.getSimpleVT().SimpleTy) {
1590 ResultReg = fastEmit_r(MVT::i8, DstVT.getSimpleVT(), ISD::ZERO_EXTEND
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  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TargetLoweringBase.cpp 933 MVT SVT = VT.getSimpleVT();
1022 MVT NVT = MVT::getVectorVT(EltVT.getSimpleVT(), NumElts);
1045 MVT LargerVector = MVT::getVectorVT(EltVT.getSimpleVT(), NumElts);
1520 RegisterVT = RegisterEVT.getSimpleVT();
1827 return std::make_pair(Cost, MTy.getSimpleVT());
1834 return std::make_pair(Cost, MTy.getSimpleVT());
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
ARCISelLowering.cpp 485 switch (RegVT.getSimpleVT().SimpleTy) {
488 << (unsigned)RegVT.getSimpleVT().SimpleTy << "\n");
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyFastISel.cpp 120 return VT.isSimple() ? VT.getSimpleVT().SimpleTy
1169 Register Reg = fastEmit_ISD_BITCAST_r(VT.getSimpleVT(), RetVT.getSimpleVT(),
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
InlineAsmLowering.cpp 328 OpInfo.ConstraintVT = TLI->getValueType(DL, OpTy, true).getSimpleVT();
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64TargetTransformInfo.cpp 845 DstTy.getSimpleVT(),
846 SrcTy.getSimpleVT()))
1147 SelCondTy.getSimpleVT(),
1148 SelValTy.getSimpleVT()))
AArch64FastISel.cpp 516 MVT VT = CEVT.getSimpleVT();
967 VT = evt.getSimpleVT();
1453 MVT VT = EVT.getSimpleVT();
2856 emitIntExt(SrcVT.getSimpleVT(), SrcReg, MVT::i32, /*isZExt*/ !Signed);
2915 MVT VT = ArgVT.getSimpleVT().SimpleTy;
3816 MVT RVVT = RVEVT.getSimpleVT();
3867 MVT SrcVT = SrcEVT.getSimpleVT();
3868 MVT DestVT = DestEVT.getSimpleVT();
4524 MVT DestVT = DestEVT.getSimpleVT();
4873 IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*isZExt=*/false)
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