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    Searched refs:getSimpleValueType (Results 1 - 25 of 42) sorted by relevancy

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  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelDAGToDAG.cpp 140 *IndexVT = Operands.back()->getSimpleValueType(0);
167 MVT VT = Node->getSimpleValueType(0);
207 MVT VT = Node->getSimpleValueType(0);
252 MVT VT = Node->getSimpleValueType(0);
303 MVT VT = Node->getOperand(2)->getSimpleValueType(0);
333 MVT VT = Node->getOperand(2)->getSimpleValueType(0);
378 MVT VT = Node->getSimpleValueType(0);
453 MVT Src1VT = Src1.getSimpleValueType();
522 MVT Src1VT = Src1.getSimpleValueType();
772 MVT VT = Node->getSimpleValueType(0)
    [all...]
RISCVISelLowering.cpp 1322 MVT VT = Op.getSimpleValueType();
1339 MVT VT = Op.getSimpleValueType();
1709 MVT VT = Op.getSimpleValueType();
1731 V.getOperand(0).getSimpleValueType().getVectorNumElements();
1905 unsigned RVVOpc = ContainerVT.bitsGT(Op.getSimpleValueType())
1995 MVT VT = Op.getSimpleValueType();
2007 MVT VT = Op.getSimpleValueType();
2022 MVT VT = Op.getSimpleValueType();
2037 MVT SrcVT = Src.getSimpleValueType();
2087 MVT VT = Op.getSimpleValueType();
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
ResourcePriorityQueue.cpp 97 MVT VT = ScegN->getSimpleValueType(i);
135 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo());
331 MVT VT = SU->getNode()->getSimpleValueType(i);
340 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo());
479 MVT VT = ScegN->getSimpleValueType(i);
490 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo());
InstrEmitter.cpp 107 MVT VT = Node->getSimpleValueType(ResNo);
130 MVT VT = Node->getSimpleValueType(Op.getResNo());
217 if (i < NumResults && TLI->isTypeLegal(Node->getSimpleValueType(i))) {
219 Node->getSimpleValueType(i),
282 Op.getSimpleValueType(), Op.getNode()->isDivergent());
385 MVT OpVT = Op.getSimpleValueType();
499 TLI->getRegClassFor(Node->getSimpleValueType(0), Node->isDivergent());
533 Node->getOperand(0).getSimpleValueType(),
570 TLI->getRegClassFor(Node->getSimpleValueType(0), Node->isDivergent());
ScheduleDAGRRList.cpp 1154 MVT VT = N->getSimpleValueType(i);
1162 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo());
1292 return N->getSimpleValueType(NumRes);
2119 MVT VT = N->getSimpleValueType(i);
2165 MVT VT = N->getSimpleValueType(i);
2275 MVT VT = PN->getSimpleValueType(0);
2287 MVT VT = PN->getSimpleValueType(0);
2294 MVT VT = PN->getSimpleValueType(i);
2311 MVT VT = N->getSimpleValueType(i);
2893 MVT VT = N->getSimpleValueType(i)
    [all...]
LegalizeVectorOps.cpp 291 MVT ValVT = ST->getValue().getSimpleValueType();
499 MVT OpVT = Node->getOperand(0).getSimpleValueType();
603 MVT VT = Node->getSimpleValueType(0);
640 MVT VT = Node->getOperand(IsStrict ? 1 : 0).getSimpleValueType();
678 MVT VT = Node->getSimpleValueType(0);
1354 MVT OpVT = Node->getOperand(0).getSimpleValueType();
ScheduleDAGFast.cpp 221 MVT VT = N->getSimpleValueType(i);
228 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo());
441 return N->getSimpleValueType(NumRes);
LegalizeDAG.cpp 504 MVT VT = Value.getSimpleValueType();
674 MVT VT = Node->getSimpleValueType(0);
1045 MVT OpVT = Node->getOperand(CompareOperand).getSimpleValueType();
2045 switch (Node->getSimpleValueType(0).SimpleTy) {
2078 switch (Node->getSimpleValueType(0).SimpleTy) {
2135 switch (Node->getSimpleValueType(0).SimpleTy) {
2196 switch (Node->getSimpleValueType(0).SimpleTy) {
2230 switch (Node->getSimpleValueType(0).SimpleTy) {
3203 MVT SVT = Op.getSimpleValueType();
3286 MVT VT = LHS.getSimpleValueType();
    [all...]
ScheduleDAGSDNodes.cpp 134 TRI->getMinimalPhysRegClass(Reg, Def->getSimpleValueType(ResNo));
592 ValueType = Node->getSimpleValueType(DefIdx);
TargetLowering.cpp 3176 isCondCodeLegal(Cond, N0.getSimpleValueType()))
3502 isCondCodeLegal(SwappedCC, N0.getSimpleValueType())))
3511 isCondCodeLegal(SwappedCC, N0.getSimpleValueType())) &&
3793 isCondCodeLegal(CC, N0.getOperand(0).getSimpleValueType()))
4174 isCondCodeLegal(SwapCond, N0.getSimpleValueType())) {
4182 if (!isCondCodeLegal(Cond, N0.getSimpleValueType())) {
4197 isCondCodeLegal(NewCond, N0.getSimpleValueType()))
4220 isCondCodeLegal(NewCond, N0.getSimpleValueType())))
4662 getSimpleValueType(DL, STy->getElementType(ResNo));
4665 OpInfo.ConstraintVT = getSimpleValueType(DL, Call.getType())
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelDAGToDAG.cpp 424 MVT VecVT = N->getOperand(0).getSimpleValueType();
432 MVT VecVT = N->getSimpleValueType(0);
848 MVT VT = N->getSimpleValueType(0);
888 N->getSimpleValueType(0).isVector()) {
895 MVT VT = N->getSimpleValueType(0);
914 MVT VT = N->getSimpleValueType(0);
938 MVT VT = N->getSimpleValueType(0);
989 if (!N->getSimpleValueType(0).isVector())
1120 MVT VT = N->getSimpleValueType(0);
1210 MVT SrcVT = N->getOperand(0).getSimpleValueType();
    [all...]
X86ISelLowering.cpp 5989 MVT SVT = Vec.getSimpleValueType().getScalarType();
6166 MVT OpVT = Op.getSimpleValueType();
6185 MVT SubVecVT = SubVec.getSimpleValueType();
6475 MVT VT = V2.getSimpleValueType();
7379 MVT VT = N.getSimpleValueType();
7522 MVT VT = N.getSimpleValueType();
7875 if (!Src.getSimpleValueType().isVector()) {
8102 MVT VT = Op.getSimpleValueType();
8230 MVT VT = Op.getSimpleValueType();
8263 MVT VT = Elt.getOperand(0).getSimpleValueType();
    [all...]
X86FastISel.cpp 1552 MVT SrcVT = TLI.getSimpleValueType(DL, I->getOperand(0)->getType());
1610 MVT SrcVT = TLI.getSimpleValueType(DL, I->getOperand(0)->getType());
2408 MVT SrcVT = TLI.getSimpleValueType(DL, I->getOperand(0)->getType());
3117 MVT VT = TLI.getSimpleValueType(DL, Arg.getType());
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsISelDAGToDAG.cpp 285 if (Node->getSimpleValueType(0).isVector() &&
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
InlineAsmLowering.cpp 334 TLI->getSimpleValueType(DL, STy->getElementType(ResNo));
337 OpInfo.ConstraintVT = TLI->getSimpleValueType(DL, Call.getType());
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/
VEISelLowering.cpp 1585 MVT VT = Op.getSimpleValueType();
1644 MVT ElemVT = Op.getSimpleValueType().getVectorElementType();
2742 MVT VT = Op.getOperand(0).getSimpleValueType();
2775 if (Op.getSimpleValueType() == MVT::f32) {
2778 assert(Op.getSimpleValueType() == MVT::i32);
2787 MVT VT = Op.getOperand(0).getSimpleValueType();
2806 if (Idx.getSimpleValueType() == MVT::i32)
2808 if (Val.getSimpleValueType() == MVT::f32)
2810 assert(Val.getSimpleValueType() == MVT::i32);
2831 SDValue(DAG.getMachineNode(VE::LSVrr_v, DL, Vec.getSimpleValueType(),
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyISelLowering.cpp 1647 MVT VecT = Extract.getOperand(0).getSimpleValueType();
1922 MVT VecType = Op.getOperand(0).getSimpleValueType();
1949 assert(Op->getOperand(0)->getSimpleValueType(0) == MVT::v2i64);
1976 EVT LaneT = Op.getSimpleValueType().getVectorElementType();
1982 size_t NumLanes = Op.getSimpleValueType().getVectorNumElements();
2008 assert(Op.getSimpleValueType().isVector());
2069 MVT SrcType = CastOp.getSimpleValueType();
2070 MVT DstType = Bitcast.getSimpleValueType();
  /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
AVRISelLowering.cpp 517 assert((LHS.getSimpleValueType() == RHS.getSimpleValueType()) &&
519 assert(((LHS.getSimpleValueType() == MVT::i16) ||
520 (LHS.getSimpleValueType() == MVT::i8)) && "invalid comparison type");
524 if (LHS.getSimpleValueType() == MVT::i16 && isa<ConstantSDNode>(RHS)) {
AVRISelDAGToDAG.cpp 470 MVT Type = N->getSimpleValueType(0);
  /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
M68kISelLowering.cpp 1901 MVT VT = Op.getSimpleValueType();
1956 bool IsFP = Op1.getSimpleValueType().isFloatingPoint();
1974 assert(LHS.getSimpleValueType().isInteger() && "SETCCCARRY is integer only.");
2446 MVT VT = Op.getNode()->getSimpleValueType(0);
3319 MVT VT = N->getSimpleValueType(0);
3332 MVT VT = N->getSimpleValueType(0);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelDAGToDAG.cpp 664 switch (N->getSimpleValueType(0).SimpleTy) {
702 switch (N->getSimpleValueType(0).SimpleTy) {
713 switch (N->getSimpleValueType(0).SimpleTy) {
2940 AArch64::MRS, DL, N->getSimpleValueType(0), MVT::Other,
2957 AArch64::MRS, DL, N->getSimpleValueType(0), MVT::Other,
2965 AArch64::ADR, DL, N->getSimpleValueType(0), MVT::Other,
AArch64ISelLowering.cpp 3998 Op.getSimpleValueType());
4245 Index.getSimpleValueType().getVectorElementType() == MVT::i32;
4248 EVT VT = PassThru.getSimpleValueType();
4263 SDVTList VTs = DAG.getVTList(PassThru.getSimpleValueType(), MVT::Other);
4305 Index.getSimpleValueType().getVectorElementType() == MVT::i32;
4307 EVT VT = StoreVal.getSimpleValueType();
4441 MVT VT = Op.getSimpleValueType();
8977 CastVT = MVT::getVectorVT(BitCast.getSimpleValueType().getScalarType(),
10581 auto Rdx = DAG.getNode(Op, DL, VecOp.getSimpleValueType(), VecOp);
10670 MVT VT = Op.getSimpleValueType();
    [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
SelectionDAGNodes.h 183 MVT getSimpleValueType() const {
964 MVT getSimpleValueType(unsigned ResNo) const {
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUISelDAGToDAG.cpp 2247 MVT VT = Cond.getOperand(0).getSimpleValueType();
2309 MVT VT = N->getSimpleValueType(0);
2364 MVT VT = N->getSimpleValueType(0);
  /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
NVPTXISelDAGToDAG.cpp 610 if (Vector.getSimpleValueType() != MVT::v2f16)
914 MVT::SimpleValueType TargetVT = LD->getSimpleValueType(0).SimpleTy;
1773 Value.getNode()->getSimpleValueType(0).SimpleTy;

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