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    Searched refs:getSubRegIndex (Results 1 - 20 of 20) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86FixupBWInsts.cpp 194 const auto SubRegIdx = TRI->getSubRegIndex(SuperDestReg, OrigDestReg);
323 if (TRI->getSubRegIndex(NewSrcReg, OldSrc.getReg()) !=
324 TRI->getSubRegIndex(NewDestReg, OldDest.getReg()))
X86InstructionSelector.cpp 204 static unsigned getSubRegIndex(const TargetRegisterClass *RC) {
260 .addImm(getSubRegIndex(SrcRC));
289 I.getOperand(1).setSubReg(getSubRegIndex(DstRC));
886 .addImm(getSubRegIndex(SrcRC));
X86InstrInfo.cpp 8394 if (unsigned SubRegIdx = TRI->getSubRegIndex(DestReg, DescribedReg)) {
  /src/external/apache2/llvm/dist/llvm/lib/MC/
MCRegisterInfo.cpp 44 unsigned MCRegisterInfo::getSubRegIndex(MCRegister Reg,
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/MIRParser/
MIParser.h 114 unsigned getSubRegIndex(StringRef Name);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
RDFRegisters.cpp 187 LaneBitmask SM = TRI.getSubRegIndexLaneMask(SI.getSubRegIndex());
233 if (unsigned Idx = TRI.getSubRegIndex(R, RR.Reg))
235 if (unsigned Idx = TRI.getSubRegIndex(RR.Reg, R)) {
LivePhysRegs.cpp 164 unsigned SI = S.getSubRegIndex();
MachineCopyPropagation.cpp 344 unsigned SubIdx = TRI->getSubRegIndex(PreviousSrc, Src);
345 return SubIdx == TRI->getSubRegIndex(PreviousDef, Def);
AggressiveAntiDepBreaker.cpp 658 unsigned NewSubRegIdx = TRI->getSubRegIndex(SuperReg, Reg);
StackMaps.cpp 251 unsigned SubRegIdx = TRI->getSubRegIndex(LLVMRegNum, MOI->getReg());
RDFLiveness.cpp 921 LaneBitmask M = TRI.getSubRegIndexLaneMask(S.getSubRegIndex());
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
RDFCopy.cpp 127 if (RR.Mask == TRI.getSubRegIndexLaneMask(S.getSubRegIndex()))
HexagonBlockRanges.cpp 245 unsigned SI = S.getSubRegIndex();
285 SRs.insert({R.Reg, I.getSubRegIndex()});
  /src/external/apache2/llvm/dist/llvm/include/llvm/MC/
MCRegisterInfo.h 471 unsigned getSubRegIndex(MCRegister RegNo, MCRegister SubRegNo) const;
625 unsigned getSubRegIndex() const {
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/AsmPrinter/
DwarfExpression.cpp 123 unsigned Idx = TRI.getSubRegIndex(*SR, MachineReg);
146 unsigned Idx = TRI.getSubRegIndex(MachineReg, *SR);
  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
CodeGenRegisters.cpp 396 Parts.push_back(getSubRegIndex(SR->ExplicitSubRegs[j]));
481 if (Cand == this || getSubRegIndex(Cand))
492 assert(getSubRegIndex(SubReg) == SubRegIdx && "LeadingSuperRegs correct");
494 if (CodeGenSubRegIndex *SubRegIdx = getSubRegIndex(SubReg)) {
531 CodeGenSubRegIndex *SubIdx = getSubRegIndex(SubReg.second);
1409 CodeGenSubRegIndex *Idx3 = Reg1.getSubRegIndex(Reg3);
CodeGenRegisters.h 194 CodeGenSubRegIndex *getSubRegIndex(const CodeGenRegister *Reg) const {
RegisterInfoEmitter.cpp 915 SRIs.push_back(Reg.getSubRegIndex(S));
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/MIRParser/
MIParser.cpp 183 unsigned PerTargetMIParsingState::getSubRegIndex(StringRef Name) {
1434 SubReg = PFS.Target.getSubRegIndex(Name);
1996 unsigned SubRegIndex = PFS.Target.getSubRegIndex(Token.stringValue());
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/LiveDebugValues/
InstrRefBasedImpl.cpp 1831 unsigned SubRegIdx = SRI.getSubRegIndex();

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