OpenGrok
Home
Sort by:
relevance
|
last modified time
|
path
Full Search
in project(s):
src
xsrc
Definition
Symbol
File Path
History
|
|
Help
Searched
refs:getVectorMinNumElements
(Results
1 - 15
of
15
) sorted by relevancy
/src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ValueTypes.h
324
unsigned
getVectorMinNumElements
() const {
425
unsigned NElts =
getVectorMinNumElements
();
/src/external/apache2/llvm/dist/llvm/include/llvm/Support/
MachineValueType.h
481
unsigned NElts =
getVectorMinNumElements
();
656
unsigned
getVectorMinNumElements
() const {
810
return ElementCount::get(
getVectorMinNumElements
(), isScalableVector());
815
return
getVectorMinNumElements
();
/src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
LegalizeVectorTypes.cpp
1266
DAG.getVectorIdxConstant(IdxVal + LoVT.
getVectorMinNumElements
(), dl));
1280
unsigned VecElems = VecVT.
getVectorMinNumElements
();
1281
unsigned SubElems = SubVecVT.
getVectorMinNumElements
();
1282
unsigned LoElems = LoVT.
getVectorMinNumElements
();
1574
unsigned LoNumElts = Lo.getValueType().
getVectorMinNumElements
();
1660
DAG.getVScale(dl, EltVT, StepVal * LoVT.
getVectorMinNumElements
());
2393
uint64_t LoElts = Lo.getValueType().
getVectorMinNumElements
();
2419
uint64_t LoElts = Lo.getValueType().
getVectorMinNumElements
();
2423
assert(IdxVal + SubVT.
getVectorMinNumElements
() <= LoElts &&
2443
uint64_t LoElts = Lo.getValueType().
getVectorMinNumElements
();
[
all
...]
SelectionDAG.cpp
4510
unsigned IdentityIndex = i * Op.getValueType().
getVectorMinNumElements
();
4937
assert(VT.
getVectorMinNumElements
() <
4938
Operand.getValueType().
getVectorMinNumElements
() &&
5845
VT.
getVectorMinNumElements
() <= N1VT.
getVectorMinNumElements
()) &&
5849
(VT.
getVectorMinNumElements
() + N2C->getZExtValue()) <=
5850
N1VT.
getVectorMinNumElements
()) &&
5868
unsigned Factor = VT.
getVectorMinNumElements
();
6068
VT.
getVectorMinNumElements
() >= N2VT.
getVectorMinNumElements
()) &
[
all
...]
DAGCombiner.cpp
11851
unsigned DstElts = N0.getValueType().
getVectorMinNumElements
();
11852
unsigned SrcElts = N00.getValueType().
getVectorMinNumElements
();
19896
N->getOperand(0).getValueType().
getVectorMinNumElements
();
19944
(IndexC->getZExtValue() % SubVT.
getVectorMinNumElements
()) == 0) {
19945
uint64_t SubIdx = IndexC->getZExtValue() / SubVT.
getVectorMinNumElements
();
20138
unsigned NumElts = VT.
getVectorMinNumElements
();
20206
unsigned SrcNumElts = SrcVT.
getVectorMinNumElements
();
20207
unsigned DestNumElts = V.getValueType().
getVectorMinNumElements
();
20253
unsigned ExtNumElts = NVT.
getVectorMinNumElements
();
20260
unsigned ConcatSrcNumElts = ConcatSrcVT.
getVectorMinNumElements
();
[
all
...]
SelectionDAGBuilder.cpp
748
unsigned IntermediateNumElts = IntermediateVT.
getVectorMinNumElements
();
11046
unsigned NumElts = VT.
getVectorMinNumElements
();
TargetLowering.cpp
7783
unsigned NElts = VecVT.
getVectorMinNumElements
();
8767
if (TrailingElts > VT.
getVectorMinNumElements
()) {
LegalizeIntegerTypes.cpp
4927
unsigned OpNumElts = Op.getValueType().
getVectorMinNumElements
();
/src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelLowering.cpp
2322
Op.getOperand(0).getSimpleValueType().
getVectorMinNumElements
();
3684
if (VecVT.
getVectorMinNumElements
() >= 8 &&
3685
SubVecVT.
getVectorMinNumElements
() >= 8) {
3687
assert(VecVT.
getVectorMinNumElements
() % 8 == 0 &&
3688
SubVecVT.
getVectorMinNumElements
() % 8 == 0 &&
3692
MVT::getVectorVT(MVT::i8, SubVecVT.
getVectorMinNumElements
() / 8,
3694
VecVT = MVT::getVectorVT(MVT::i8, VecVT.
getVectorMinNumElements
() / 8,
3793
VL = DAG.getConstant(SubVecVT.
getVectorMinNumElements
(), DL, XLenVT);
3832
if (VecVT.
getVectorMinNumElements
() >= 8 &&
3833
SubVecVT.
getVectorMinNumElements
() >= 8)
[
all
...]
/src/external/apache2/llvm/dist/llvm/utils/TableGen/
IntrinsicEmitter.cpp
381
switch (VVT.
getVectorMinNumElements
()) {
CodeGenDAGPatterns.cpp
633
return B.
getVectorMinNumElements
() < P.
getVectorMinNumElements
();
/src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64TargetTransformInfo.cpp
568
DstTyL.first * DstTyL.second.
getVectorMinNumElements
();
570
SrcTyL.first * SrcTyL.second.
getVectorMinNumElements
();
AArch64ISelLowering.cpp
172
switch (VT.
getVectorMinNumElements
()) {
10197
} else if (Idx == InVT.
getVectorMinNumElements
()) {
13872
unsigned NumElts = N.getValueType().
getVectorMinNumElements
();
13879
if (N.getValueType().
getVectorMinNumElements
() < NumElts)
13888
return N.getValueType().
getVectorMinNumElements
() >= NumElts;
/src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonISelLowering.cpp
2104
unsigned VecLen = VT.
getVectorMinNumElements
();
/src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp
15587
128 / AVT.
getVectorMinNumElements
())),
Completed in 206 milliseconds
Indexes created Wed Jun 17 00:25:26 UTC 2026