1 /* $NetBSD: gffb.c,v 1.29 2025/10/14 05:40:35 macallan Exp $ */ 2 3 /* 4 * Copyright (c) 2013 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * A console driver for nvidia geforce graphics controllers 30 * tested on macppc only so far, should work on other hardware as long as 31 * something sets up a usable graphics mode and sets the right device properties 32 * This driver should work with all NV1x hardware but so far it's been tested 33 * only on NV11 / GeForce2 MX. Needs testing with more hardware and if 34 * successful, PCI IDs need to be added to gffb_match() 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: gffb.c,v 1.29 2025/10/14 05:40:35 macallan Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/device.h> 44 #include <sys/lwp.h> 45 #include <sys/kauth.h> 46 #include <sys/atomic.h> 47 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcireg.h> 50 #include <dev/pci/pcidevs.h> 51 #include <dev/pci/pciio.h> 52 #include <dev/pci/gffbreg.h> 53 54 #include <dev/wscons/wsdisplayvar.h> 55 #include <dev/wscons/wsconsio.h> 56 #include <dev/wsfont/wsfont.h> 57 #include <dev/rasops/rasops.h> 58 #include <dev/wscons/wsdisplay_vconsvar.h> 59 #include <dev/pci/wsdisplay_pci.h> 60 #include <dev/wscons/wsdisplay_glyphcachevar.h> 61 62 #include "opt_gffb.h" 63 #include "opt_vcons.h" 64 65 #ifdef GFFB_DEBUG 66 #define DPRINTF printf 67 #else 68 #define DPRINTF while(0) printf 69 #endif 70 71 struct gffb_softc { 72 device_t sc_dev; 73 74 pci_chipset_tag_t sc_pc; 75 pcitag_t sc_pcitag; 76 77 bus_space_tag_t sc_memt; 78 bus_space_tag_t sc_iot; 79 80 bus_space_handle_t sc_regh, sc_fbh; 81 bus_addr_t sc_fb, sc_reg; 82 bus_size_t sc_fbsize, sc_regsize; 83 uint8_t *sc_fbaddr; 84 size_t sc_vramsize; 85 uint32_t sc_fboffset; 86 87 int sc_width, sc_height, sc_depth, sc_stride; 88 int sc_locked, sc_accel, sc_mobile, sc_video, sc_bl_level; 89 struct vcons_screen sc_console_screen; 90 struct wsscreen_descr sc_defaultscreen_descr; 91 const struct wsscreen_descr *sc_screens[1]; 92 struct wsscreen_list sc_screenlist; 93 struct vcons_data vd; 94 int sc_mode, sc_arch; 95 u_char sc_cmap_red[256]; 96 u_char sc_cmap_green[256]; 97 u_char sc_cmap_blue[256]; 98 int sc_put, sc_current, sc_free; 99 uint32_t sc_rop; 100 void (*sc_putchar)(void *, int, int, u_int, long); 101 kmutex_t sc_lock; 102 glyphcache sc_gc; 103 }; 104 105 static int gffb_match(device_t, cfdata_t, void *); 106 static void gffb_attach(device_t, device_t, void *); 107 108 CFATTACH_DECL_NEW(gffb, sizeof(struct gffb_softc), 109 gffb_match, gffb_attach, NULL, NULL); 110 111 static int gffb_ioctl(void *, void *, u_long, void *, int, struct lwp *); 112 static paddr_t gffb_mmap(void *, void *, off_t, int); 113 static void gffb_init_screen(void *, struct vcons_screen *, int, long *); 114 115 static int gffb_putcmap(struct gffb_softc *, struct wsdisplay_cmap *); 116 static int gffb_getcmap(struct gffb_softc *, struct wsdisplay_cmap *); 117 static void gffb_restore_palette(struct gffb_softc *); 118 static int gffb_putpalreg(struct gffb_softc *, uint8_t, uint8_t, 119 uint8_t, uint8_t); 120 static void gffb_setvideo(struct gffb_softc *, int); 121 static int gffb_get_backlight(struct gffb_softc *); 122 static void gffb_set_backlight(struct gffb_softc *, int); 123 static void gffb_brightness_up(device_t); 124 static void gffb_brightness_down(device_t); 125 126 static void gffb_init(struct gffb_softc *); 127 128 static void gffb_make_room(struct gffb_softc *, int); 129 static void gffb_sync(struct gffb_softc *); 130 131 static void gffb_rectfill(struct gffb_softc *, int, int, int, int, 132 uint32_t); 133 static void gffb_bitblt(void *, int, int, int, int, int, int, int); 134 static void gffb_rop(struct gffb_softc *, int); 135 136 static void gffb_cursor(void *, int, int, int); 137 static void gffb_putchar(void *, int, int, u_int, long); 138 static void gffb_putchar_mono(void *, int, int, u_int, long); 139 static void gffb_copycols(void *, int, int, int, int); 140 static void gffb_erasecols(void *, int, int, int, long); 141 static void gffb_copyrows(void *, int, int, int); 142 static void gffb_eraserows(void *, int, int, long); 143 144 #define GFFB_READ_4(o) bus_space_read_stream_4(sc->sc_memt, sc->sc_regh, (o)) 145 #define GFFB_READ_1(o) bus_space_read_1(sc->sc_memt, sc->sc_regh, (o)) 146 #define GFFB_WRITE_4(o, v) bus_space_write_stream_4(sc->sc_memt, sc->sc_regh, (o), (v)) 147 #define GFFB_WRITE_1(o, v) bus_space_write_1(sc->sc_memt, sc->sc_regh, (o), (v)) 148 149 struct wsdisplay_accessops gffb_accessops = { 150 gffb_ioctl, 151 gffb_mmap, 152 NULL, /* alloc_screen */ 153 NULL, /* free_screen */ 154 NULL, /* show_screen */ 155 NULL, /* load_font */ 156 NULL, /* pollc */ 157 NULL /* scroll */ 158 }; 159 160 static void 161 gffb_write_crtc(struct gffb_softc *sc, int head, uint8_t reg, uint8_t val) 162 { 163 if (head == 0) { 164 GFFB_WRITE_1(GFFB_PCIO0 + 0x3d4, reg); 165 GFFB_WRITE_1(GFFB_PCIO0 + 0x3d5, val); 166 } else { 167 GFFB_WRITE_1(GFFB_PCIO1 + 0x3d4, reg); 168 GFFB_WRITE_1(GFFB_PCIO1 + 0x3d5, val); 169 } 170 } 171 172 static uint8_t 173 gffb_read_crtc(struct gffb_softc *sc, int head, uint8_t reg) 174 { 175 if (head == 0) { 176 GFFB_WRITE_1(GFFB_PCIO0 + 0x3d4, reg); 177 return GFFB_READ_1(GFFB_PCIO0 + 0x3d5); 178 } else { 179 GFFB_WRITE_1(GFFB_PCIO1 + 0x3d4, reg); 180 return GFFB_READ_1(GFFB_PCIO1 + 0x3d5); 181 } 182 } 183 184 static int 185 gffb_match(device_t parent, cfdata_t match, void *aux) 186 { 187 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 188 189 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY) 190 return 0; 191 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_NVIDIA) 192 return 0; 193 194 /* only cards tested on so far - likely needs a list */ 195 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GEFORCE2MX) 196 return 100; 197 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GEFORCE_6800U) 198 return 100; 199 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GF_FXGO5200) 200 return 100; 201 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GF_FX5200U) 202 return 100; 203 return (0); 204 } 205 206 static void 207 gffb_attach(device_t parent, device_t self, void *aux) 208 { 209 struct gffb_softc *sc = device_private(self); 210 struct pci_attach_args *pa = aux; 211 struct rasops_info *ri; 212 bus_space_tag_t tag; 213 struct wsemuldisplaydev_attach_args aa; 214 prop_dictionary_t dict; 215 unsigned long defattr; 216 pcireg_t reg; 217 bool is_console = FALSE; 218 uint32_t addr; 219 int i, j, f; 220 uint8_t cmap[768]; 221 222 sc->sc_pc = pa->pa_pc; 223 sc->sc_pcitag = pa->pa_tag; 224 sc->sc_memt = pa->pa_memt; 225 sc->sc_iot = pa->pa_iot; 226 sc->sc_dev = self; 227 228 sc->sc_mobile = 0; 229 sc->sc_video = 0; 230 231 /* first, see what kind of chip we've got */ 232 reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_ID_REG); 233 switch (PCI_PRODUCT(reg)) { 234 case PCI_PRODUCT_NVIDIA_GEFORCE2MX: 235 sc->sc_accel = true; 236 sc->sc_arch = 10; 237 break; 238 case PCI_PRODUCT_NVIDIA_GEFORCE_6800U: 239 sc->sc_accel = false; 240 sc->sc_arch = 40; 241 break; 242 case PCI_PRODUCT_NVIDIA_GF_FXGO5200: 243 sc->sc_mobile = 1; 244 /* FALLTHROUGH */ 245 case PCI_PRODUCT_NVIDIA_GF_FX5200U: 246 sc->sc_accel = true; 247 sc->sc_arch = 30; 248 break; 249 default: 250 sc->sc_accel = false; 251 sc->sc_arch = 0; 252 } 253 254 pci_aprint_devinfo(pa, NULL); 255 DPRINTF("%s accel %d arch %d\n", __func__, sc->sc_accel, sc->sc_arch); 256 /* fill in parameters from properties */ 257 dict = device_properties(self); 258 if (!prop_dictionary_get_uint32(dict, "width", &sc->sc_width)) { 259 aprint_error("%s: no width property\n", device_xname(self)); 260 return; 261 } 262 if (!prop_dictionary_get_uint32(dict, "height", &sc->sc_height)) { 263 aprint_error("%s: no height property\n", device_xname(self)); 264 return; 265 } 266 267 #ifdef GLYPHCACHE_DEBUG 268 /* leave some visible VRAM unused so we can see the glyph cache */ 269 sc->sc_height -= 300; 270 #endif 271 272 if (!prop_dictionary_get_uint32(dict, "depth", &sc->sc_depth)) { 273 aprint_error("%s: no depth property\n", device_xname(self)); 274 return; 275 } 276 if (!prop_dictionary_get_uint32(dict, "linebytes", &sc->sc_stride)) { 277 aprint_error("%s: no linebytes property\n", 278 device_xname(self)); 279 return; 280 } 281 282 /* 283 * we need this for the unaccelerated case, aka nv40 284 */ 285 sc->sc_fboffset = 0; 286 if (prop_dictionary_get_uint32(dict, "address", &addr)) { 287 sc->sc_fboffset = addr & 0x000fffff; /* XXX */ 288 } 289 DPRINTF("%s: fboffset %8x\n", __func__, sc->sc_fboffset); 290 prop_dictionary_get_bool(dict, "is_console", &is_console); 291 292 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM, 0, 293 &tag, &sc->sc_regh, &sc->sc_reg, &sc->sc_regsize)) { 294 aprint_error("%s: failed to map registers.\n", 295 device_xname(sc->sc_dev)); 296 } 297 /* 298 * first thing we need to make sure register access uses host byte order 299 * so we can recycle as much of xf86-video-nv as possible 300 */ 301 #if BYTE_ORDER == BIG_ENDIAN 302 uint32_t mreg = GFFB_READ_4(GFFB_PMC + 4); 303 if ((mreg & 0x01000001) == 0) { 304 GFFB_WRITE_4(GFFB_PMC + 4, 0x01000001); 305 } 306 #endif 307 sc->sc_vramsize = GFFB_READ_4(GFFB_VRAM) & 0xfff00000; 308 309 /* don't map more VRAM than we actually have */ 310 if (pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, 311 0x14, PCI_MAPREG_TYPE_MEM, &sc->sc_fb, &sc->sc_fbsize, &f)) { 312 aprint_error("%s: can't find the framebuffer?!\n", 313 device_xname(sc->sc_dev)); 314 } 315 if (sc->sc_vramsize == 0) sc->sc_vramsize = sc->sc_fbsize; 316 317 /* don't map (much) more than we actually need */ 318 if (bus_space_map(sc->sc_memt, sc->sc_fb, 0x1000000, 319 BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR, 320 &sc->sc_fbh)) { 321 aprint_error("%s: failed to map the framebuffer.\n", 322 device_xname(sc->sc_dev)); 323 } 324 sc->sc_fbaddr = bus_space_vaddr(tag, sc->sc_fbh); 325 326 aprint_normal("%s: %d MB aperture at 0x%08x\n", device_xname(self), 327 (int)(sc->sc_fbsize >> 20), (uint32_t)sc->sc_fb); 328 aprint_normal_dev(sc->sc_dev, "%d MB video memory\n", 329 (int)(sc->sc_vramsize >> 20)); 330 331 sc->sc_defaultscreen_descr = (struct wsscreen_descr){ 332 "default", 333 0, 0, 334 NULL, 335 8, 16, 336 WSSCREEN_WSCOLORS | WSSCREEN_HILIT | WSSCREEN_RESIZE, 337 NULL 338 }; 339 sc->sc_screens[0] = &sc->sc_defaultscreen_descr; 340 sc->sc_screenlist = (struct wsscreen_list){1, sc->sc_screens}; 341 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 342 sc->sc_locked = 0; 343 344 #ifdef GFFB_DEBUG 345 printf("put: %08x\n", GFFB_READ_4(GFFB_FIFO_PUT)); 346 printf("get: %08x\n", GFFB_READ_4(GFFB_FIFO_GET)); 347 #endif 348 349 /* 350 * we don't have hardware synchronization so we need a lock to serialize 351 * access to the DMA buffer between normal and kernel output 352 * actually it might be enough to use atomic ops on sc_current, sc_free 353 * etc. but for now we'll play it safe 354 * XXX we will probably deadlock if we take an interrupt while sc_lock 355 * is held and then try to printf() 356 */ 357 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 358 359 /* init engine here */ 360 gffb_init(sc); 361 gffb_setvideo(sc, 1); 362 363 if (sc->sc_mobile) { 364 pmf_event_register(sc->sc_dev, PMFE_DISPLAY_BRIGHTNESS_UP, 365 gffb_brightness_up, TRUE); 366 pmf_event_register(sc->sc_dev, PMFE_DISPLAY_BRIGHTNESS_DOWN, 367 gffb_brightness_down, TRUE); 368 } 369 370 #ifdef GFFB_DEBUG 371 printf("put: %08x\n", GFFB_READ_4(GFFB_FIFO_PUT)); 372 printf("get: %08x\n", GFFB_READ_4(GFFB_FIFO_GET)); 373 #endif 374 vcons_init(&sc->vd, sc, &sc->sc_defaultscreen_descr, 375 &gffb_accessops); 376 sc->vd.init_screen = gffb_init_screen; 377 378 379 ri = &sc->sc_console_screen.scr_ri; 380 381 if (sc->sc_accel) { 382 sc->sc_gc.gc_bitblt = gffb_bitblt; 383 sc->sc_gc.gc_blitcookie = sc; 384 sc->sc_gc.gc_rop = 0xcc; 385 sc->vd.show_screen_cookie = &sc->sc_gc; 386 sc->vd.show_screen_cb = glyphcache_adapt; 387 } 388 389 if (is_console) { 390 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 391 &defattr); 392 sc->sc_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 393 394 if (sc->sc_accel) { 395 gffb_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, 396 ri->ri_devcmap[(defattr >> 16) & 0xf]); 397 } else { 398 memset(sc->sc_fbaddr + sc->sc_fboffset, 399 ri->ri_devcmap[(defattr >> 16) & 0xf], 400 sc->sc_stride * sc->sc_height); 401 } 402 sc->sc_defaultscreen_descr.textops = &ri->ri_ops; 403 sc->sc_defaultscreen_descr.capabilities = ri->ri_caps; 404 sc->sc_defaultscreen_descr.nrows = ri->ri_rows; 405 sc->sc_defaultscreen_descr.ncols = ri->ri_cols; 406 407 if (sc->sc_accel) 408 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 409 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 410 sc->sc_width, 411 ri->ri_font->fontwidth, 412 ri->ri_font->fontheight, 413 defattr); 414 415 wsdisplay_cnattach(&sc->sc_defaultscreen_descr, ri, 0, 0, 416 defattr); 417 vcons_replay_msgbuf(&sc->sc_console_screen); 418 } else { 419 /* 420 * since we're not the console we can postpone the rest 421 * until someone actually allocates a screen for us 422 */ 423 if (sc->sc_console_screen.scr_ri.ri_rows == 0) { 424 /* do some minimal setup to avoid weirdnesses later */ 425 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 426 &defattr); 427 } else 428 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr); 429 430 if (sc->sc_accel) 431 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 432 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 433 sc->sc_width, 434 ri->ri_font->fontwidth, 435 ri->ri_font->fontheight, 436 defattr); 437 } 438 439 j = 0; 440 rasops_get_cmap(ri, cmap, sizeof(cmap)); 441 for (i = 0; i < 256; i++) { 442 sc->sc_cmap_red[i] = cmap[j]; 443 sc->sc_cmap_green[i] = cmap[j + 1]; 444 sc->sc_cmap_blue[i] = cmap[j + 2]; 445 gffb_putpalreg(sc, i, cmap[j], cmap[j + 1], cmap[j + 2]); 446 j += 3; 447 } 448 449 /* no suspend/resume support yet */ 450 if (!pmf_device_register(sc->sc_dev, NULL, NULL)) 451 aprint_error_dev(sc->sc_dev, 452 "couldn't establish power handler\n"); 453 454 aa.console = is_console; 455 aa.scrdata = &sc->sc_screenlist; 456 aa.accessops = &gffb_accessops; 457 aa.accesscookie = &sc->vd; 458 459 config_found(sc->sc_dev, &aa, wsemuldisplaydevprint, CFARGS_NONE); 460 } 461 462 static int 463 gffb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l) 464 { 465 struct vcons_data *vd = v; 466 struct gffb_softc *sc = vd->cookie; 467 struct wsdisplay_fbinfo *wdf; 468 struct vcons_screen *ms = vd->active; 469 struct wsdisplay_param *param; 470 471 switch (cmd) { 472 case WSDISPLAYIO_GTYPE: 473 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 474 return 0; 475 476 /* PCI config read/write passthrough. */ 477 case PCI_IOC_CFGREAD: 478 case PCI_IOC_CFGWRITE: 479 return pci_devioctl(sc->sc_pc, sc->sc_pcitag, 480 cmd, data, flag, l); 481 482 case WSDISPLAYIO_GET_BUSID: 483 return wsdisplayio_busid_pci(sc->sc_dev, sc->sc_pc, 484 sc->sc_pcitag, data); 485 486 case WSDISPLAYIO_GINFO: 487 if (ms == NULL) 488 return ENODEV; 489 wdf = (void *)data; 490 wdf->height = ms->scr_ri.ri_height; 491 wdf->width = ms->scr_ri.ri_width; 492 wdf->depth = ms->scr_ri.ri_depth; 493 wdf->cmsize = 256; 494 return 0; 495 496 case WSDISPLAYIO_GETCMAP: 497 return gffb_getcmap(sc, 498 (struct wsdisplay_cmap *)data); 499 500 case WSDISPLAYIO_PUTCMAP: 501 return gffb_putcmap(sc, 502 (struct wsdisplay_cmap *)data); 503 504 case WSDISPLAYIO_LINEBYTES: 505 *(u_int *)data = sc->sc_stride; 506 return 0; 507 508 case WSDISPLAYIO_SMODE: { 509 int new_mode = *(int*)data; 510 if (new_mode != sc->sc_mode) { 511 sc->sc_mode = new_mode; 512 if(new_mode == WSDISPLAYIO_MODE_EMUL) { 513 gffb_init(sc); 514 gffb_restore_palette(sc); 515 if (sc->sc_accel) { 516 glyphcache_wipe(&sc->sc_gc); 517 gffb_rectfill(sc, 0, 0, sc->sc_width, 518 sc->sc_height, ms->scr_ri.ri_devcmap[ 519 (ms->scr_defattr >> 16) & 0xf]); 520 } else { 521 memset(sc->sc_fbaddr + sc->sc_fboffset, 522 ms->scr_ri.ri_devcmap[ 523 (ms->scr_defattr >> 16) & 0xf], 524 sc->sc_stride * sc->sc_height); 525 } 526 vcons_redraw_screen(ms); 527 } 528 } 529 } 530 return 0; 531 532 case WSDISPLAYIO_GET_EDID: { 533 struct wsdisplayio_edid_info *d = data; 534 return wsdisplayio_get_edid(sc->sc_dev, d); 535 } 536 537 case WSDISPLAYIO_GET_FBINFO: { 538 struct wsdisplayio_fbinfo *fbi = data; 539 return wsdisplayio_get_fbinfo(&ms->scr_ri, fbi); 540 } 541 542 case WSDISPLAYIO_GETPARAM: 543 param = (struct wsdisplay_param *)data; 544 if (sc->sc_mobile == 0) 545 return EPASSTHROUGH; 546 switch (param->param) { 547 548 case WSDISPLAYIO_PARAM_BRIGHTNESS: 549 param->min = 0; 550 param->max = 255; 551 param->curval = sc->sc_bl_level; 552 return 0; 553 554 case WSDISPLAYIO_PARAM_BACKLIGHT: 555 param->min = 0; 556 param->max = 1; 557 param->curval = sc->sc_video; 558 return 0; 559 } 560 return EPASSTHROUGH; 561 562 case WSDISPLAYIO_SETPARAM: 563 param = (struct wsdisplay_param *)data; 564 if (sc->sc_mobile == 0) 565 return EPASSTHROUGH; 566 switch (param->param) { 567 568 case WSDISPLAYIO_PARAM_BRIGHTNESS: 569 gffb_set_backlight(sc, param->curval); 570 return 0; 571 572 case WSDISPLAYIO_PARAM_BACKLIGHT: 573 gffb_setvideo(sc, param->curval); 574 return 0; 575 } 576 return EPASSTHROUGH; 577 578 case WSDISPLAYIO_GVIDEO: 579 if (sc->sc_video) 580 *(int *)data = WSDISPLAYIO_VIDEO_ON; 581 else 582 *(int *)data = WSDISPLAYIO_VIDEO_OFF; 583 return 0; 584 585 case WSDISPLAYIO_SVIDEO: 586 gffb_setvideo(sc, *(int *)data == WSDISPLAYIO_VIDEO_ON); 587 return 0; 588 } 589 return EPASSTHROUGH; 590 } 591 592 static paddr_t 593 gffb_mmap(void *v, void *vs, off_t offset, int prot) 594 { 595 struct vcons_data *vd = v; 596 struct gffb_softc *sc = vd->cookie; 597 paddr_t pa; 598 599 /* 'regular' framebuffer mmap()ing */ 600 if (offset < sc->sc_vramsize) { 601 pa = bus_space_mmap(sc->sc_memt, sc->sc_fb + offset + 0x2000, 602 0, prot, BUS_SPACE_MAP_LINEAR); 603 return pa; 604 } 605 606 /* 607 * restrict all other mappings to processes with superuser privileges 608 * or the kernel itself 609 */ 610 if (kauth_authorize_machdep(kauth_cred_get(), 611 KAUTH_MACHDEP_UNMANAGEDMEM, 612 NULL, NULL, NULL, NULL) != 0) { 613 aprint_normal("%s: mmap() rejected.\n", 614 device_xname(sc->sc_dev)); 615 return -1; 616 } 617 618 if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) { 619 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 620 BUS_SPACE_MAP_LINEAR); 621 return pa; 622 } 623 624 if ((offset >= sc->sc_reg) && 625 (offset < (sc->sc_reg + sc->sc_regsize))) { 626 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 627 BUS_SPACE_MAP_LINEAR); 628 return pa; 629 } 630 631 #ifdef PCI_MAGIC_IO_RANGE 632 /* allow mapping of IO space */ 633 if ((offset >= PCI_MAGIC_IO_RANGE) && 634 (offset < PCI_MAGIC_IO_RANGE + 0x10000)) { 635 pa = bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 636 0, prot, BUS_SPACE_MAP_LINEAR); 637 return pa; 638 } 639 #endif 640 641 return -1; 642 } 643 644 static void 645 gffb_init_screen(void *cookie, struct vcons_screen *scr, 646 int existing, long *defattr) 647 { 648 struct gffb_softc *sc = cookie; 649 struct rasops_info *ri = &scr->scr_ri; 650 651 ri->ri_depth = sc->sc_depth; 652 ri->ri_width = sc->sc_width; 653 ri->ri_height = sc->sc_height; 654 ri->ri_stride = sc->sc_stride; 655 if (sc->sc_depth == 8) 656 ri->ri_bits = sc->sc_fbaddr + sc->sc_fboffset; 657 ri->ri_flg = RI_CENTER | RI_FULLCLEAR; 658 ri->ri_flg |= RI_8BIT_IS_RGB | RI_ENABLE_ALPHA; 659 660 rasops_init(ri, 0, 0); 661 ri->ri_caps = WSSCREEN_WSCOLORS | WSSCREEN_RESIZE; 662 scr->scr_flags |= VCONS_LOADFONT; 663 664 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 665 sc->sc_width / ri->ri_font->fontwidth); 666 667 ri->ri_hw = scr; 668 669 if (sc->sc_accel) { 670 ri->ri_ops.copyrows = gffb_copyrows; 671 ri->ri_ops.copycols = gffb_copycols; 672 ri->ri_ops.eraserows = gffb_eraserows; 673 ri->ri_ops.erasecols = gffb_erasecols; 674 ri->ri_ops.cursor = gffb_cursor; 675 if (FONT_IS_ALPHA(ri->ri_font)) { 676 sc->sc_putchar = ri->ri_ops.putchar; 677 ri->ri_ops.putchar = gffb_putchar; 678 } else 679 ri->ri_ops.putchar = gffb_putchar_mono; 680 } else { 681 scr->scr_flags |= VCONS_DONT_READ; 682 } 683 } 684 685 static int 686 gffb_putcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 687 { 688 u_char *r, *g, *b; 689 u_int index = cm->index; 690 u_int count = cm->count; 691 int i, error; 692 u_char rbuf[256], gbuf[256], bbuf[256]; 693 694 #ifdef GFFB_DEBUG 695 aprint_debug("putcmap: %d %d\n",index, count); 696 #endif 697 if (cm->index >= 256 || cm->count > 256 || 698 (cm->index + cm->count) > 256) 699 return EINVAL; 700 error = copyin(cm->red, &rbuf[index], count); 701 if (error) 702 return error; 703 error = copyin(cm->green, &gbuf[index], count); 704 if (error) 705 return error; 706 error = copyin(cm->blue, &bbuf[index], count); 707 if (error) 708 return error; 709 710 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 711 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 712 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 713 714 r = &sc->sc_cmap_red[index]; 715 g = &sc->sc_cmap_green[index]; 716 b = &sc->sc_cmap_blue[index]; 717 718 for (i = 0; i < count; i++) { 719 gffb_putpalreg(sc, index, *r, *g, *b); 720 index++; 721 r++, g++, b++; 722 } 723 return 0; 724 } 725 726 static int 727 gffb_getcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 728 { 729 u_int index = cm->index; 730 u_int count = cm->count; 731 int error; 732 733 if (index >= 255 || count > 256 || index + count > 256) 734 return EINVAL; 735 736 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 737 if (error) 738 return error; 739 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 740 if (error) 741 return error; 742 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 743 if (error) 744 return error; 745 746 return 0; 747 } 748 749 static void 750 gffb_restore_palette(struct gffb_softc *sc) 751 { 752 int i; 753 754 for (i = 0; i < (1 << sc->sc_depth); i++) { 755 gffb_putpalreg(sc, i, sc->sc_cmap_red[i], 756 sc->sc_cmap_green[i], sc->sc_cmap_blue[i]); 757 } 758 } 759 760 static int 761 gffb_putpalreg(struct gffb_softc *sc, uint8_t idx, uint8_t r, uint8_t g, 762 uint8_t b) 763 { 764 /* port 0 */ 765 GFFB_WRITE_1(GFFB_PDIO0 + GFFB_PEL_IW, idx); 766 GFFB_WRITE_1(GFFB_PDIO0 + GFFB_PEL_D, r); 767 GFFB_WRITE_1(GFFB_PDIO0 + GFFB_PEL_D, g); 768 GFFB_WRITE_1(GFFB_PDIO0 + GFFB_PEL_D, b); 769 770 /* port 1 */ 771 GFFB_WRITE_1(GFFB_PDIO1 + GFFB_PEL_IW, idx); 772 GFFB_WRITE_1(GFFB_PDIO1 + GFFB_PEL_D, r); 773 GFFB_WRITE_1(GFFB_PDIO1 + GFFB_PEL_D, g); 774 GFFB_WRITE_1(GFFB_PDIO1 + GFFB_PEL_D, b); 775 776 return 0; 777 } 778 779 static void 780 gffb_setvideo(struct gffb_softc *sc, int on) 781 { 782 uint8_t reg0, reg1; 783 784 if (sc->sc_video == on) 785 return; 786 787 reg0 = gffb_read_crtc(sc, 0, 0x1a) & 0x3f; 788 reg1 = gffb_read_crtc(sc, 1, 0x1a) & 0x3f; 789 790 if (!on) { 791 reg0 |= 0xc0; 792 reg1 |= 0xc0; 793 } 794 795 gffb_write_crtc(sc, 0, 0x1a, reg0); 796 gffb_write_crtc(sc, 1, 0x1a, reg1); 797 798 sc->sc_video = on; 799 800 if(sc->sc_mobile) { 801 gffb_set_backlight(sc, sc->sc_bl_level); 802 } 803 } 804 805 static void 806 gffb_dma_kickoff(struct gffb_softc *sc) 807 { 808 volatile uint32_t junk; 809 if (sc->sc_current != sc->sc_put) { 810 sc->sc_put = sc->sc_current; 811 bus_space_barrier(sc->sc_memt, sc->sc_fbh, 0, 0x1000000, 812 BUS_SPACE_BARRIER_WRITE); 813 junk = *sc->sc_fbaddr; 814 __USE(junk); 815 GFFB_WRITE_4(GFFB_FIFO_PUT, sc->sc_put); 816 bus_space_barrier(sc->sc_memt, sc->sc_regh, GFFB_FIFO_PUT, 4, 817 BUS_SPACE_BARRIER_WRITE); 818 } 819 } 820 821 static void 822 gffb_dmanext(struct gffb_softc *sc, uint32_t data) 823 { 824 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, sc->sc_current, data); 825 sc->sc_current += 4; 826 } 827 828 static void 829 gffb_dmastart(struct gffb_softc *sc, uint32_t tag, int size) 830 { 831 if(sc->sc_free <= (size << 2)) 832 gffb_make_room(sc, size); 833 gffb_dmanext(sc, ((size) << 18) | (tag)); 834 sc->sc_free -= ((size + 1) << 2); 835 } 836 837 /* 838 * from xf86_video_nv/nv_xaa.c: 839 * There is a HW race condition with videoram command buffers. 840 * You can't jump to the location of your put offset. We write put 841 * at the jump offset + SKIPS dwords with noop padding in between 842 * to solve this problem 843 */ 844 845 #define SKIPS 8 846 847 static void 848 gffb_make_room(struct gffb_softc *sc, int size) 849 { 850 uint32_t get; 851 852 size = (size + 1) << 2; /* slots -> offset */ 853 854 while (sc->sc_free < size) { 855 get = GFFB_READ_4(GFFB_FIFO_GET); 856 857 if (sc->sc_put >= get) { 858 sc->sc_free = 0x2000 - sc->sc_current; 859 if (sc->sc_free < size) { 860 gffb_dmanext(sc, 0x20000000); 861 if(get <= (SKIPS << 2)) { 862 if (sc->sc_put <= (SKIPS << 2)) { 863 /* corner case - will be idle */ 864 GFFB_WRITE_4(GFFB_FIFO_PUT, 865 (SKIPS + 1) << 2); 866 } 867 do { 868 get =GFFB_READ_4(GFFB_FIFO_GET); 869 } while (get <= (SKIPS << 2)); 870 } 871 GFFB_WRITE_4(GFFB_FIFO_PUT, SKIPS << 2); 872 sc->sc_current = sc->sc_put = (SKIPS << 2); 873 sc->sc_free = get - ((SKIPS + 1) << 2); 874 } 875 } else 876 sc->sc_free = get - sc->sc_current - 4; 877 } 878 } 879 880 static void 881 gffb_sync(struct gffb_softc *sc) 882 { 883 int bail; 884 int i; 885 886 /* 887 * if there are commands in the buffer make sure the chip is actually 888 * trying to run them 889 */ 890 gffb_dma_kickoff(sc); 891 892 /* now wait for the command buffer to drain... */ 893 bail = 100000000; 894 while ((GFFB_READ_4(GFFB_FIFO_GET) != sc->sc_put) && (bail > 0)) { 895 bail--; 896 } 897 if (bail == 0) { 898 printf("FIFO isn't moving\n"); 899 goto crap; 900 } 901 902 /* ... and for the engine to go idle */ 903 bail = 100000000; 904 while((GFFB_READ_4(GFFB_BUSY) != 0) && (bail > 0)) { 905 bail--; 906 } 907 if (bail == 0) goto crap; 908 return; 909 crap: 910 /* if we time out fill the buffer with NOPs and cross fingers */ 911 DPRINTF("GET %08x\n", GFFB_READ_4(GFFB_FIFO_GET)); 912 sc->sc_put = 0; 913 sc->sc_current = 0; 914 for (i = 0; i < 0x2000; i += 4) 915 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, i, 0); 916 aprint_error_dev(sc->sc_dev, "DMA lockup\n"); 917 } 918 919 static int 920 gffb_get_backlight(struct gffb_softc *sc) 921 { 922 uint32_t pmc; 923 pmc = (GFFB_READ_4(GFFB_PMC + 0x10F0) & 0x7FFF0000) >> 16; 924 pmc = (pmc - GFFB_BL_MIN) * 256 / (GFFB_BL_MAX - GFFB_BL_MIN); 925 return pmc; 926 } 927 928 static void 929 gffb_set_backlight(struct gffb_softc *sc, int level) 930 { 931 uint32_t pmc = GFFB_READ_4(GFFB_PMC + 0x10F0) & 0x0000ffff; 932 uint32_t bl, pcrt; 933 934 if (level < 0) level = 0; 935 if (level > 255) level = 255; 936 937 pcrt = GFFB_READ_4(GFFB_CRTC0 + 0x081C) & 0xFFFFFFFC; 938 bl = (level * (GFFB_BL_MAX - GFFB_BL_MIN) / 256) + GFFB_BL_MIN; 939 pmc |= bl << 16; 940 if (sc->sc_video && (level > 0)) { 941 pcrt |= 0x1; 942 pmc |= 0x80000000; 943 } 944 GFFB_WRITE_4(GFFB_PMC + 0x10F0, pmc); 945 GFFB_WRITE_4(GFFB_CRTC0 + 0x081C, pcrt); 946 DPRINTF("%s: %d %08x %08x\n", __func__, level, pmc, pcrt); 947 sc->sc_bl_level = level; 948 } 949 950 static void 951 gffb_brightness_up(device_t dev) 952 { 953 struct gffb_softc *sc = device_private(dev); 954 955 sc->sc_video = 1; 956 gffb_set_backlight(sc, sc->sc_bl_level + 8); 957 } 958 959 static void 960 gffb_brightness_down(device_t dev) 961 { 962 struct gffb_softc *sc = device_private(dev); 963 964 gffb_set_backlight(sc, sc->sc_bl_level - 8); 965 } 966 967 void 968 gffb_init(struct gffb_softc *sc) 969 { 970 int i; 971 uint32_t foo; 972 973 if (!sc->sc_accel) return; 974 DPRINTF("%s offset %08x %08x\n", __func__, 975 GFFB_READ_4(GFFB_CRTC0 + GFFB_DISPLAYSTART), 976 GFFB_READ_4(GFFB_CRTC1 + GFFB_DISPLAYSTART)); 977 978 sc->sc_fboffset = 0x2000; 979 980 if (sc->sc_mobile) { 981 sc->sc_bl_level = gffb_get_backlight(sc); 982 } 983 984 /* init display start */ 985 GFFB_WRITE_4(GFFB_CRTC0 + GFFB_DISPLAYSTART, sc->sc_fboffset); 986 GFFB_WRITE_4(GFFB_CRTC1 + GFFB_DISPLAYSTART, sc->sc_fboffset); 987 988 /* make sure we do 8bit per channel */ 989 GFFB_WRITE_1(GFFB_PDIO0 + GFFB_PEL_MASK, 0xff); 990 GFFB_WRITE_1(GFFB_PDIO1 + GFFB_PEL_MASK, 0xff); 991 992 /* DMA stuff. A whole lot of magic number voodoo from xf86-video-nv */ 993 GFFB_WRITE_4(GFFB_PMC + 0x140, 0); 994 GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffff00ff); 995 GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffffffff); 996 GFFB_WRITE_4(GFFB_PTIMER + 0x800, 8); 997 GFFB_WRITE_4(GFFB_PTIMER + 0x840, 3); 998 GFFB_WRITE_4(GFFB_PTIMER + 0x500, 0); 999 GFFB_WRITE_4(GFFB_PTIMER + 0x400, 0xffffffff); 1000 for (i = 0; i < 8; i++) { 1001 GFFB_WRITE_4(GFFB_PFB + 0x0240 + (i * 0x10), 0); 1002 GFFB_WRITE_4(GFFB_PFB + 0x0244 + (i * 0x10), 1003 sc->sc_vramsize - 1); 1004 } 1005 1006 GFFB_WRITE_4(GFFB_PRAMIN, 0x80000010); 1007 GFFB_WRITE_4(GFFB_PRAMIN + 0x04, 0x80011201); 1008 GFFB_WRITE_4(GFFB_PRAMIN + 0x08, 0x80000011); 1009 GFFB_WRITE_4(GFFB_PRAMIN + 0x0c, 0x80011202); 1010 GFFB_WRITE_4(GFFB_PRAMIN + 0x10, 0x80000012); 1011 GFFB_WRITE_4(GFFB_PRAMIN + 0x14, 0x80011203); 1012 GFFB_WRITE_4(GFFB_PRAMIN + 0x18, 0x80000013); 1013 GFFB_WRITE_4(GFFB_PRAMIN + 0x1c, 0x80011204); 1014 GFFB_WRITE_4(GFFB_PRAMIN + 0x20, 0x80000014); 1015 GFFB_WRITE_4(GFFB_PRAMIN + 0x24, 0x80011205); 1016 GFFB_WRITE_4(GFFB_PRAMIN + 0x28, 0x80000015); 1017 GFFB_WRITE_4(GFFB_PRAMIN + 0x2c, 0x80011206); 1018 GFFB_WRITE_4(GFFB_PRAMIN + 0x30, 0x80000016); 1019 GFFB_WRITE_4(GFFB_PRAMIN + 0x34, 0x80011207); 1020 GFFB_WRITE_4(GFFB_PRAMIN + 0x38, 0x80000017); 1021 GFFB_WRITE_4(GFFB_PRAMIN + 0x3c, 0x80011208); 1022 GFFB_WRITE_4(GFFB_PRAMIN + 0x2000, 0x00003000); 1023 GFFB_WRITE_4(GFFB_PRAMIN + 0x2004, sc->sc_vramsize - 1); 1024 GFFB_WRITE_4(GFFB_PRAMIN + 0x2008, 0x00000002); 1025 GFFB_WRITE_4(GFFB_PRAMIN + 0x200c, 0x00000002); 1026 GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01008062); /* nv10+ */ 1027 GFFB_WRITE_4(GFFB_PRAMIN + 0x2014, 0); 1028 GFFB_WRITE_4(GFFB_PRAMIN + 0x2018, 0x12001200); 1029 GFFB_WRITE_4(GFFB_PRAMIN + 0x201c, 0); 1030 GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01008043); 1031 GFFB_WRITE_4(GFFB_PRAMIN + 0x2024, 0); 1032 GFFB_WRITE_4(GFFB_PRAMIN + 0x2028, 0); 1033 GFFB_WRITE_4(GFFB_PRAMIN + 0x202c, 0); 1034 GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01008044); 1035 GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000002); 1036 GFFB_WRITE_4(GFFB_PRAMIN + 0x2038, 0); 1037 GFFB_WRITE_4(GFFB_PRAMIN + 0x203c, 0); 1038 GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01008019); 1039 GFFB_WRITE_4(GFFB_PRAMIN + 0x2044, 0); 1040 GFFB_WRITE_4(GFFB_PRAMIN + 0x2048, 0); 1041 GFFB_WRITE_4(GFFB_PRAMIN + 0x204c, 0); 1042 GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0100a05c); 1043 GFFB_WRITE_4(GFFB_PRAMIN + 0x2054, 0); 1044 GFFB_WRITE_4(GFFB_PRAMIN + 0x2058, 0); 1045 GFFB_WRITE_4(GFFB_PRAMIN + 0x205c, 0); 1046 /* XXX 0x0100805f if !WaitVSyncPossible */ 1047 GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0100805f); 1048 GFFB_WRITE_4(GFFB_PRAMIN + 0x2064, 0); 1049 GFFB_WRITE_4(GFFB_PRAMIN + 0x2068, 0x12001200); 1050 GFFB_WRITE_4(GFFB_PRAMIN + 0x206c, 0); 1051 GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0100804a); 1052 GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000002); 1053 GFFB_WRITE_4(GFFB_PRAMIN + 0x2078, 0); 1054 GFFB_WRITE_4(GFFB_PRAMIN + 0x207c, 0); 1055 GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01018077); 1056 GFFB_WRITE_4(GFFB_PRAMIN + 0x2084, 0); 1057 GFFB_WRITE_4(GFFB_PRAMIN + 0x2088, 0x12001200); 1058 GFFB_WRITE_4(GFFB_PRAMIN + 0x208c, 0); 1059 GFFB_WRITE_4(GFFB_PRAMIN + 0x2090, 0x00003002); 1060 GFFB_WRITE_4(GFFB_PRAMIN + 0x2094, 0x00007fff); 1061 /* command buffer start with some flag in the lower bits */ 1062 GFFB_WRITE_4(GFFB_PRAMIN + 0x2098, sc->sc_vramsize | 0x00000002); 1063 GFFB_WRITE_4(GFFB_PRAMIN + 0x209c, 0x00000002); 1064 #if BYTE_ORDER == BIG_ENDIAN 1065 GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01088062); 1066 GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01088043); 1067 GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01088044); 1068 GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01088019); 1069 GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0108a05c); 1070 GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0108805f); 1071 GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0108804a); 1072 GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01098077); 1073 GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000001); 1074 GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000001); 1075 #endif 1076 /* PGRAPH setup */ 1077 GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0xFFFFFFFF); 1078 GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0x00000000); 1079 1080 GFFB_WRITE_4(GFFB_PGRAPH + 0x0140, 0x00000000); 1081 GFFB_WRITE_4(GFFB_PGRAPH + 0x0100, 0xFFFFFFFF); 1082 GFFB_WRITE_4(GFFB_PGRAPH + 0x0144, 0x10010100); 1083 GFFB_WRITE_4(GFFB_PGRAPH + 0x0714, 0xFFFFFFFF); 1084 GFFB_WRITE_4(GFFB_PGRAPH + 0x0720, 0x00000001); 1085 /* 1086 * xf86_video_nv does this in two writes, 1087 * not sure if they can be combined 1088 */ 1089 foo = GFFB_READ_4(GFFB_PGRAPH + 0x0710); 1090 foo &= 0x0007ff00; 1091 foo |= 0x00020100; 1092 GFFB_WRITE_4(GFFB_PGRAPH + 0x0710, foo); 1093 1094 /* NV_ARCH_10 */ 1095 if(sc->sc_arch == 10) { 1096 GFFB_WRITE_4(GFFB_PGRAPH + 0x0084, 0x00118700); 1097 GFFB_WRITE_4(GFFB_PGRAPH + 0x0088, 0x24E00810); 1098 GFFB_WRITE_4(GFFB_PGRAPH + 0x008C, 0x55DE0030); 1099 1100 for(i = 0; i < 128; i += 4) { 1101 GFFB_WRITE_4(GFFB_PGRAPH + 0x0B00 + i, 1102 GFFB_READ_4(GFFB_PFB + 0x0240 + i)); 1103 } 1104 1105 GFFB_WRITE_4(GFFB_PGRAPH + 0x640, 0); 1106 GFFB_WRITE_4(GFFB_PGRAPH + 0x644, 0); 1107 GFFB_WRITE_4(GFFB_PGRAPH + 0x684, sc->sc_vramsize - 1); 1108 GFFB_WRITE_4(GFFB_PGRAPH + 0x688, sc->sc_vramsize - 1); 1109 1110 GFFB_WRITE_4(GFFB_PGRAPH + 0x0810, 0x00000000); 1111 GFFB_WRITE_4(GFFB_PGRAPH + 0x0608, 0xFFFFFFFF); 1112 } else { 1113 /* nv30 */ 1114 GFFB_WRITE_4(GFFB_PGRAPH + 0x0084, 0x40108700); 1115 GFFB_WRITE_4(GFFB_PGRAPH + 0x0890, 0x00140000); 1116 GFFB_WRITE_4(GFFB_PGRAPH + 0x008C, 0xf00e0431); 1117 GFFB_WRITE_4(GFFB_PGRAPH + 0x0090, 0x00008000); 1118 GFFB_WRITE_4(GFFB_PGRAPH + 0x0610, 0xf04b1f36); 1119 GFFB_WRITE_4(GFFB_PGRAPH + 0x0B80, 0x1002d888); 1120 GFFB_WRITE_4(GFFB_PGRAPH + 0x0B88, 0x62ff007f); 1121 1122 for (i = 0; i < 128; i += 4) { 1123 GFFB_WRITE_4(GFFB_PGRAPH + 0x0900 + i, 1124 GFFB_READ_4(GFFB_PFB + 0x0240 + i)); 1125 GFFB_WRITE_4(GFFB_PGRAPH + 0x6900 + i, 1126 GFFB_READ_4(GFFB_PFB + 0x0240 + i)); 1127 } 1128 1129 GFFB_WRITE_4(GFFB_PGRAPH + 0x09A4, 1130 GFFB_READ_4(GFFB_PFB + 0x0200)); 1131 GFFB_WRITE_4(GFFB_PGRAPH + 0x09A8, 1132 GFFB_READ_4(GFFB_PFB + 0x0204)); 1133 GFFB_WRITE_4(GFFB_PGRAPH + 0x0750, 0x00EA0000); 1134 GFFB_WRITE_4(GFFB_PGRAPH + 0x0754, 1135 GFFB_READ_4(GFFB_PFB + 0x0200)); 1136 GFFB_WRITE_4(GFFB_PGRAPH + 0x0750, 0x00EA0004); 1137 GFFB_WRITE_4(GFFB_PGRAPH + 0x0754, 1138 GFFB_READ_4(GFFB_PFB + 0x0204)); 1139 1140 GFFB_WRITE_4(GFFB_PGRAPH + 0x0820, 0); 1141 GFFB_WRITE_4(GFFB_PGRAPH + 0x0824, 0); 1142 GFFB_WRITE_4(GFFB_PGRAPH + 0x0864, sc->sc_vramsize - 1); 1143 GFFB_WRITE_4(GFFB_PGRAPH + 0x0868, sc->sc_vramsize - 1); 1144 1145 GFFB_WRITE_4(GFFB_PGRAPH + 0x0B20, 0x00000000); 1146 GFFB_WRITE_4(GFFB_PGRAPH + 0x0B04, 0xFFFFFFFF); 1147 } 1148 1149 /* PFIFO setup */ 1150 GFFB_WRITE_4(GFFB_PGRAPH + 0x053C, 0); 1151 GFFB_WRITE_4(GFFB_PGRAPH + 0x0540, 0); 1152 GFFB_WRITE_4(GFFB_PGRAPH + 0x0544, 0x00007FFF); 1153 GFFB_WRITE_4(GFFB_PGRAPH + 0x0548, 0x00007FFF); 1154 1155 GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0); 1156 GFFB_WRITE_4(GFFB_PFIFO + 0x0504, 0x00000001); 1157 GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0); 1158 GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0); 1159 GFFB_WRITE_4(GFFB_PFIFO + 0x1204, 0x00000100); /* different on nv40 */ 1160 GFFB_WRITE_4(GFFB_PFIFO + 0x1240, 0); 1161 GFFB_WRITE_4(GFFB_PFIFO + 0x1244, 0); 1162 GFFB_WRITE_4(GFFB_PFIFO + 0x122c, 0x00001209); /* different on nv40 */ 1163 GFFB_WRITE_4(GFFB_PFIFO + 0x1000, 0); 1164 GFFB_WRITE_4(GFFB_PFIFO + 0x1050, 0); 1165 GFFB_WRITE_4(GFFB_PFIFO + 0x0210, 0x03000100); 1166 GFFB_WRITE_4(GFFB_PFIFO + 0x0214, 0x00000110); 1167 GFFB_WRITE_4(GFFB_PFIFO + 0x0218, 0x00000112); 1168 GFFB_WRITE_4(GFFB_PFIFO + 0x050c, 0x0000ffff); 1169 GFFB_WRITE_4(GFFB_PFIFO + 0x1258, 0x0000ffff); 1170 GFFB_WRITE_4(GFFB_PFIFO + 0x0140, 0); 1171 GFFB_WRITE_4(GFFB_PFIFO + 0x0100, 0xffffffff); 1172 GFFB_WRITE_4(GFFB_PFIFO + 0x1054, 0x00000001); 1173 GFFB_WRITE_4(GFFB_PFIFO + 0x1230, 0); 1174 GFFB_WRITE_4(GFFB_PFIFO + 0x1280, 0); 1175 #if BYTE_ORDER == BIG_ENDIAN 1176 GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x800f0078); 1177 #else 1178 GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x000f0078); 1179 #endif 1180 GFFB_WRITE_4(GFFB_PFIFO + 0x1220, 0x00000001); 1181 GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0x00000001); 1182 GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0x00000001); 1183 GFFB_WRITE_4(GFFB_PFIFO + 0x1254, 0x00000001); 1184 GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0x00000001); 1185 1186 GFFB_WRITE_4(GFFB_PMC + 0x8704, 1); 1187 GFFB_WRITE_4(GFFB_PMC + 0x8140, 0); 1188 GFFB_WRITE_4(GFFB_PMC + 0x8920, 0); 1189 GFFB_WRITE_4(GFFB_PMC + 0x8924, 0); 1190 GFFB_WRITE_4(GFFB_PMC + 0x8908, sc->sc_vramsize - 1); 1191 GFFB_WRITE_4(GFFB_PMC + 0x890C, sc->sc_vramsize - 1); 1192 GFFB_WRITE_4(GFFB_PMC + 0x1588, 0); 1193 1194 __asm("eieio; sync;"); 1195 GFFB_WRITE_4(GFFB_FIFO_GET, 0); 1196 GFFB_WRITE_4(GFFB_CMDSTART, 0x00000002); 1197 sc->sc_put = 0; 1198 sc->sc_current = 0; 1199 sc->sc_free = 0x2000; 1200 1201 for(i = 0; i < SKIPS; i++) 1202 gffb_dmanext(sc, 0); 1203 1204 gffb_dmanext(sc, 0x00040000); 1205 gffb_dmanext(sc, 0x80000010); 1206 gffb_dmanext(sc, 0x00042000); 1207 gffb_dmanext(sc, 0x80000011); 1208 gffb_dmanext(sc, 0x00044000); 1209 gffb_dmanext(sc, 0x80000012); 1210 gffb_dmanext(sc, 0x00046000); 1211 gffb_dmanext(sc, 0x80000013); 1212 gffb_dmanext(sc, 0x00048000); 1213 gffb_dmanext(sc, 0x80000014); 1214 gffb_dmanext(sc, 0x0004A000); 1215 gffb_dmanext(sc, 0x80000015); 1216 gffb_dmanext(sc, 0x0004C000); 1217 gffb_dmanext(sc, 0x80000016); 1218 gffb_dmanext(sc, 0x0004E000); 1219 gffb_dmanext(sc, 0x80000017); 1220 sc->sc_free = 0x2000 - sc->sc_current; 1221 1222 gffb_dmastart(sc, SURFACE_FORMAT, 4); 1223 gffb_dmanext(sc, SURFACE_FORMAT_DEPTH8); 1224 gffb_dmanext(sc, sc->sc_stride | (sc->sc_stride << 16)); 1225 gffb_dmanext(sc, sc->sc_fboffset); /* src offset */ 1226 gffb_dmanext(sc, sc->sc_fboffset); /* dst offset */ 1227 1228 gffb_dmastart(sc, RECT_FORMAT, 1); 1229 gffb_dmanext(sc, RECT_FORMAT_DEPTH8); 1230 1231 gffb_dmastart(sc, PATTERN_FORMAT, 1); 1232 gffb_dmanext(sc, PATTERN_FORMAT_DEPTH8); 1233 1234 gffb_dmastart(sc, PATTERN_COLOR_0, 4); 1235 gffb_dmanext(sc, 0xffffffff); 1236 gffb_dmanext(sc, 0xffffffff); 1237 gffb_dmanext(sc, 0xffffffff); 1238 gffb_dmanext(sc, 0xffffffff); 1239 1240 gffb_dmastart(sc, ROP_SET, 1); 1241 gffb_dmanext(sc, 0xcc); 1242 sc->sc_rop = 0xcc; 1243 DPRINTF("put %x current %x\n", sc->sc_put, sc->sc_current); 1244 1245 gffb_dma_kickoff(sc); 1246 DPRINTF("put %x current %x\n", sc->sc_put, sc->sc_current); 1247 #ifdef GFFB_DEBUG 1248 printf("put: %08x\n", GFFB_READ_4(GFFB_FIFO_PUT)); 1249 printf("get: %08x\n", GFFB_READ_4(GFFB_FIFO_GET)); 1250 #endif 1251 gffb_sync(sc); 1252 DPRINTF("put %x current %x\n", sc->sc_put, sc->sc_current); 1253 } 1254 1255 static void 1256 gffb_rop(struct gffb_softc *sc, int rop) 1257 { 1258 if (rop == sc->sc_rop) 1259 return; 1260 sc->sc_rop = rop; 1261 gffb_dmastart(sc, ROP_SET, 1); 1262 gffb_dmanext(sc, rop); 1263 } 1264 1265 static void 1266 gffb_rectfill(struct gffb_softc *sc, int x, int y, int wi, int he, 1267 uint32_t colour) 1268 { 1269 if (!sc->sc_accel) return; 1270 mutex_enter(&sc->sc_lock); 1271 gffb_rop(sc, 0xcc); 1272 1273 gffb_dmastart(sc, RECT_SOLID_COLOR, 1); 1274 gffb_dmanext(sc, colour); 1275 1276 gffb_dmastart(sc, RECT_SOLID_RECTS(0), 2); 1277 gffb_dmanext(sc, (x << 16) | y); 1278 gffb_dmanext(sc, (wi << 16) | he); 1279 gffb_dma_kickoff(sc); 1280 mutex_exit(&sc->sc_lock); 1281 } 1282 1283 static void 1284 gffb_bitblt(void *cookie, int xs, int ys, int xd, int yd, 1285 int wi, int he, int rop) 1286 { 1287 struct gffb_softc *sc = cookie; 1288 1289 if (!sc->sc_accel) return; 1290 mutex_enter(&sc->sc_lock); 1291 1292 gffb_rop(sc, rop); 1293 1294 gffb_dmastart(sc, BLIT_POINT_SRC, 3); 1295 gffb_dmanext(sc, (ys << 16) | xs); 1296 gffb_dmanext(sc, (yd << 16) | xd); 1297 gffb_dmanext(sc, (he << 16) | wi); 1298 gffb_dma_kickoff(sc); 1299 mutex_exit(&sc->sc_lock); 1300 } 1301 1302 static void 1303 gffb_cursor(void *cookie, int on, int row, int col) 1304 { 1305 struct rasops_info *ri = cookie; 1306 struct vcons_screen *scr = ri->ri_hw; 1307 struct gffb_softc *sc = scr->scr_cookie; 1308 int x, y, wi, he; 1309 1310 wi = ri->ri_font->fontwidth; 1311 he = ri->ri_font->fontheight; 1312 1313 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 1314 x = ri->ri_ccol * wi + ri->ri_xorigin; 1315 y = ri->ri_crow * he + ri->ri_yorigin; 1316 if (ri->ri_flg & RI_CURSOR) { 1317 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1318 ri->ri_flg &= ~RI_CURSOR; 1319 } 1320 ri->ri_crow = row; 1321 ri->ri_ccol = col; 1322 if (on) { 1323 x = ri->ri_ccol * wi + ri->ri_xorigin; 1324 y = ri->ri_crow * he + ri->ri_yorigin; 1325 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1326 ri->ri_flg |= RI_CURSOR; 1327 } 1328 } else { 1329 scr->scr_ri.ri_crow = row; 1330 scr->scr_ri.ri_ccol = col; 1331 scr->scr_ri.ri_flg &= ~RI_CURSOR; 1332 } 1333 1334 } 1335 1336 static void 1337 gffb_putchar(void *cookie, int row, int col, u_int c, long attr) 1338 { 1339 struct rasops_info *ri = cookie; 1340 struct wsdisplay_font *font = PICK_FONT(ri, c); 1341 struct vcons_screen *scr = ri->ri_hw; 1342 struct gffb_softc *sc = scr->scr_cookie; 1343 int x, y, wi, he, rv = GC_NOPE; 1344 uint32_t bg; 1345 1346 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) 1347 return; 1348 1349 if (!CHAR_IN_FONT(c, font)) 1350 return; 1351 1352 wi = font->fontwidth; 1353 he = font->fontheight; 1354 1355 x = ri->ri_xorigin + col * wi; 1356 y = ri->ri_yorigin + row * he; 1357 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 1358 1359 if (c == 0x20) { 1360 gffb_rectfill(sc, x, y, wi, he, bg); 1361 return; 1362 } 1363 rv = glyphcache_try(&sc->sc_gc, c, x, y, attr); 1364 if (rv == GC_OK) 1365 return; 1366 1367 /* 1368 * Use gffb_sync to wait for the engine to become idle before 1369 * we start scribbling into VRAM -- we wouldn't want to stomp on 1370 * a scroll in progress or a prior glyphcache_add that hasn't 1371 * completed yet on the GPU. 1372 */ 1373 mutex_enter(&sc->sc_lock); 1374 gffb_sync(sc); 1375 sc->sc_putchar(cookie, row, col, c, attr); 1376 mutex_exit(&sc->sc_lock); 1377 1378 /* 1379 * If glyphcache_try asked us to, cache the newly written 1380 * character. This will issue a gffb_bitblt which will wait 1381 * for our CPU writes to the framebuffer in VRAM to complete 1382 * before triggering GPU reads from the framebuffer in VRAM. 1383 */ 1384 if (rv == GC_ADD) { 1385 glyphcache_add(&sc->sc_gc, c, x, y); 1386 } 1387 } 1388 1389 static void 1390 gffb_putchar_mono(void *cookie, int row, int col, u_int c, long attr) 1391 { 1392 struct rasops_info *ri = cookie; 1393 struct wsdisplay_font *font = PICK_FONT(ri, c); 1394 struct vcons_screen *scr = ri->ri_hw; 1395 struct gffb_softc *sc = scr->scr_cookie; 1396 void *data; 1397 int x, y, wi, he, rv = GC_NOPE, i; 1398 uint32_t bg, fg; 1399 1400 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) 1401 return; 1402 1403 if (!CHAR_IN_FONT(c, font)) 1404 return; 1405 1406 wi = font->fontwidth; 1407 he = font->fontheight; 1408 1409 x = ri->ri_xorigin + col * wi; 1410 y = ri->ri_yorigin + row * he; 1411 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 1412 1413 if (c == 0x20) { 1414 gffb_rectfill(sc, x, y, wi, he, bg); 1415 return; 1416 } 1417 rv = glyphcache_try(&sc->sc_gc, c, x, y, attr); 1418 if (rv == GC_OK) 1419 return; 1420 1421 fg = ri->ri_devcmap[(attr >> 24) & 0xf]; 1422 data = WSFONT_GLYPH(c, font); 1423 1424 mutex_enter(&sc->sc_lock); 1425 1426 gffb_rop(sc, 0xcc); 1427 1428 gffb_dmastart(sc, RECT_EXPAND_TWO_COLOR_CLIP, 7); 1429 gffb_dmanext(sc, (y << 16) | (x & 0xFFFF)); 1430 gffb_dmanext(sc, ((y + he) << 16) | ((x + wi) & 0xFFFF)); 1431 gffb_dmanext(sc, bg); 1432 gffb_dmanext(sc, fg); 1433 gffb_dmanext(sc, (he << 16) | 32); 1434 gffb_dmanext(sc, (he << 16) | 32); 1435 gffb_dmanext(sc, (y << 16) | (x & 0xFFFF)); 1436 1437 gffb_dmastart(sc, RECT_EXPAND_TWO_COLOR_DATA(0), he); 1438 switch (font->stride) { 1439 case 1: { 1440 uint8_t *data8 = data; 1441 uint32_t reg; 1442 for (i = 0; i < he; i++) { 1443 reg = *data8; 1444 gffb_dmanext(sc, reg << 24); 1445 data8++; 1446 } 1447 break; 1448 } 1449 case 2: { 1450 uint16_t *data16 = data; 1451 uint32_t reg; 1452 for (i = 0; i < he; i++) { 1453 reg = *data16; 1454 gffb_dmanext(sc, reg << 16); 1455 data16++; 1456 } 1457 break; 1458 } 1459 } 1460 1461 gffb_dma_kickoff(sc); 1462 mutex_exit(&sc->sc_lock); 1463 1464 if (rv == GC_ADD) { 1465 glyphcache_add(&sc->sc_gc, c, x, y); 1466 } 1467 } 1468 1469 static void 1470 gffb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1471 { 1472 struct rasops_info *ri = cookie; 1473 struct vcons_screen *scr = ri->ri_hw; 1474 struct gffb_softc *sc = scr->scr_cookie; 1475 int32_t xs, xd, y, width, height; 1476 1477 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1478 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1479 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1480 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1481 width = ri->ri_font->fontwidth * ncols; 1482 height = ri->ri_font->fontheight; 1483 gffb_bitblt(sc, xs, y, xd, y, width, height, 0xcc); 1484 } 1485 } 1486 1487 static void 1488 gffb_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1489 { 1490 struct rasops_info *ri = cookie; 1491 struct vcons_screen *scr = ri->ri_hw; 1492 struct gffb_softc *sc = scr->scr_cookie; 1493 int32_t x, y, width, height, fg, bg, ul; 1494 1495 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1496 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1497 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1498 width = ri->ri_font->fontwidth * ncols; 1499 height = ri->ri_font->fontheight; 1500 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1501 1502 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1503 } 1504 } 1505 1506 static void 1507 gffb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1508 { 1509 struct rasops_info *ri = cookie; 1510 struct vcons_screen *scr = ri->ri_hw; 1511 struct gffb_softc *sc = scr->scr_cookie; 1512 int32_t x, ys, yd, width, height; 1513 1514 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1515 x = ri->ri_xorigin; 1516 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1517 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1518 width = ri->ri_emuwidth; 1519 height = ri->ri_font->fontheight * nrows; 1520 gffb_bitblt(sc, x, ys, x, yd, width, height, 0xcc); 1521 } 1522 } 1523 1524 static void 1525 gffb_eraserows(void *cookie, int row, int nrows, long fillattr) 1526 { 1527 struct rasops_info *ri = cookie; 1528 struct vcons_screen *scr = ri->ri_hw; 1529 struct gffb_softc *sc = scr->scr_cookie; 1530 int32_t x, y, width, height, fg, bg, ul; 1531 1532 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1533 if ((row == 0) && (nrows == ri->ri_emuheight)) { 1534 /* fullclear */ 1535 x = 0; 1536 y = 0; 1537 width = sc->sc_width; 1538 height = sc->sc_height; 1539 } else { 1540 x = ri->ri_xorigin; 1541 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1542 width = ri->ri_emuwidth; 1543 height = ri->ri_font->fontheight * nrows; 1544 } 1545 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1546 1547 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1548 } 1549 } 1550
Indexes created Tue Oct 14 06:10:07 GMT 2025