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  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/
nouveau_nvkm_engine_gr_ctxgp102.c 77 const u32 gs = gfxp * gr->ppc_tpc_max; local in function:gp102_grctx_generate_attrib
83 mmio_wr32(info, o + 0xc0, gs);
87 bo += gs;
nouveau_nvkm_engine_gr_ctxgv100.c 97 const u32 gs = gfxp * gr->ppc_tpc_max; local in function:gv100_grctx_generate_attrib
102 mmio_wr32(info, o + 0xc0, gs);
105 bo += gs;
  /src/sys/arch/amd64/include/
frame_regs.h 51 greg(gs, GS, 15) /* tf_gs */ \
asm.h 93 #define CPUVAR(off) %gs:CPU_INFO_ ## off
95 #define CPUVAR(off) %gs:CPU_INFO_/**/off
  /src/sys/arch/sparc64/dev/
tadpmu.c 292 uint8_t events, gs, vb; local in function:tadpmu_events
298 gs = tadpmu_recv();
307 events, gs, vb);
322 gs & GENSTAT_LID_CLOSED ?
331 gs & GENSTAT_DC_PRESENT ?
339 if (gs == GENSTAT_STATE_BATTERY_DISCHARGE) {
  /src/sys/arch/i386/acpi/
acpi_wakeup_low.S 53 movw %ax,%gs
99 movw %gs,ACPI_SUSPEND_GS(%edx)
  /src/sys/arch/i386/i386/
mptramp.S 136 movw %ax,%gs
234 movl %eax,%gs
i386func.S 134 movl %eax, %gs
db_machdep.c 71 { "gs", dbreg(gs), db_x86_regop, NULL },
  /src/sys/arch/i386/include/
frameasm.h 77 movw %gs,TF_GS(%esp) ; \
89 movw %ax,%gs ; \
  /src/sys/compat/linux/arch/amd64/
linux_machdep.h 81 u_int16_t gs; member in struct:linux_sigcontext
linux_machdep.c 210 sigframe.uc.luc_mcontext.gs = tf->tf_gs & 0xFFFF;
373 mctx->__gregs[_REG_GS] = lsigctx->gs & 0xFFFF;
  /src/sys/arch/i386/bioscall/
biostramp.S 47 * CS must be executable; DS,ES,FS,GS should be writable
106 pushl %gs
182 movw %bx,%gs
207 movw %ax,%gs
323 popl %gs
  /src/sys/arch/amd64/amd64/
cpufunc.S 189 movw %di, %gs
362 movq %gs:(CPU_INFO_SELF), %rax
368 movq %gs:(CPU_INFO_CURLWP), %rax
amd64_trap.S 228 movw %gs,TF_GS(%rsp)
247 * We need to be careful about %gs too, because it is possible that we were
248 * running in kernel mode with a userland %gs.
265 movw %gs,TF_GS(%rsp)
379 movw %gs,TF_GS(%rsp)
518 * We need to worry about traps in kernel mode while the kernel %gs isn't
519 * loaded. When such traps happen, we have CPL=0 and %gs=userland, and we
520 * must perform an additional swapgs to get %gs=kernel.
534 * o Reload of GS.
603 jmp .Lkernelmode_but_user /* to user - must restore %gs */
    [all...]
mptramp.S 135 movw %ax,%gs
251 * The C instrumentation uses GS.base, so initialize it right now. It
db_machdep.c 60 { "gs", dbreg(gs), db_x86_regop, NULL },
locore.S 927 movw %ax,%gs
997 * SYSCALL/SYSRET (XXX why?) and %fs/%gs, which is needed for
998 * the %gs-relative addressing used by CPUVAR(...), curcpu(),
1025 movw %ax,%gs
1486 /* Set default 64bit values in %ds, %es, %fs and %gs. */
1494 movw %ax,%gs
1503 /* Reload 64-bit %fs/%gs MSRs. */
1516 /* Reload %fs/%gs GDT descriptors. */
1523 /* Set default 32bit values in %ds, %es, %fs and %gs. */
1531 movw %ax,%gs
    [all...]
  /src/sys/arch/amd64/acpi/
acpi_wakeup_low.S 50 * FS and GS are driven by MSRs, so use NULL for them. If we're
51 * returning to a 32bit LWP, %fs/%gs will be restored in
56 movw %ax,%gs
  /src/sys/dev/nvmm/x86/
nvmm_x86_svmfunc.S 177 /* Reset FS and GS. */
180 movw %ax,%gs
  /src/sys/external/mit/xen-include-public/dist/xen/include/public/arch-x86/
xen-x86_32.h 154 uint16_t gs, _pad5; member in struct:cpu_user_regs
xen-x86_64.h 98 #define SEGBASE_GS_USER_SEL 3 /* Set user %gs specified in base[15:0] */
207 uint16_t gs, _pad6[3]; /* Non-nul => takes precedence over gs_base_user. */ member in struct:cpu_user_regs
  /src/sys/arch/i386/stand/efiboot/bootia32/
startprog32.S 208 movw %ax, %gs
  /src/sys/arch/i386/stand/efiboot/bootx64/
startprog64.S 229 movw %ax, %gs
  /src/sys/external/bsd/gnu-efi/dist/inc/ia64/
salproc.h 66 UINT16 gs; member in struct:tagIA32_BIOS_REGISTER_STATE

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