HomeSort by: relevance | last modified time | path
    Searched refs:hasInterval (Results 1 - 18 of 18) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
LiveStacks.h 78 bool hasInterval(int Slot) const { return S2IMap.count(Slot); }
LiveIntervals.h 115 if (hasInterval(Reg))
125 bool hasInterval(Register Reg) const {
132 assert(!hasInterval(Reg) && "Interval already exists!");
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
RegAllocBase.cpp 150 assert(LIS->hasInterval(Reg));
LiveRangeEdit.cpp 386 if (LIS.hasInterval(Reg) && MRI.reg_nodbg_empty(Reg)) {
RenameIndependentSubregs.cpp 395 if (!LIS->hasInterval(Reg))
StackSlotColoring.cpp 169 if (!LS->hasInterval(FI))
LiveDebugVariables.cpp 797 if (!LIS->hasInterval(Reg)) {
1010 if (!LIS.hasInterval(DstReg))
1086 if (LIS.hasInterval(LocMO.getReg())) {
LiveIntervals.cpp 166 if (hasInterval(Reg))
1553 if (Reg.isVirtual() && hasInterval(Reg) && !MO.isUndef()) {
1685 !hasInterval(MOI->getReg())) {
MachineVerifier.cpp 2044 if (LiveStks && LiveStks->hasInterval(MO->getIndex()) &&
2191 if (LiveInts->hasInterval(Reg)) {
2290 if (LiveInts->hasInterval(Reg)) {
2710 if (!LiveInts->hasInterval(Reg)) {
InlineSpiller.cpp 734 assert(LIS.hasInterval(Reg) &&
MachineBasicBlock.cpp 1215 if (PHISrcRegs.count(Reg) || !LIS->hasInterval(Reg))
ModuloSchedule.cpp 345 if (!LIS.hasInterval(ToReg))
RegAllocGreedy.cpp 1551 if (!LIS->hasInterval(Evictor))
RegisterCoalescer.cpp 3781 if (!LIS->hasInterval(reg))
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
GCNRegPressure.h 227 if (!LIS.hasInterval(Reg))
GCNRegPressure.cpp 31 if (!LIS.hasInterval(Reg))
269 if (!LIS.hasInterval(Reg))
GCNNSAReassign.cpp 214 if (!LIS->hasInterval(Reg))
SIRegisterInfo.cpp 2391 if (!LIS->hasInterval(Reg))

Completed in 64 milliseconds