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    Searched refs:horz (Results 1 - 13 of 13) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/include/drm/
drm_rect.h 147 * @horz: horizontal downscale factor
150 * Divide the coordinates of rectangle @r by @horz and @vert.
152 static inline void drm_rect_downscale(struct drm_rect *r, int horz, int vert)
154 r->x1 /= horz;
156 r->x2 /= horz;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
transform.h 144 struct fixed31_32 horz; member in struct:scaling_ratios
151 int horz; member in struct:sharpness_adj
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_dpp.c 152 scl_data->ratios.horz.value != dc_fixpt_one.value &&
164 if (scl_data->ratios.horz.value == (4ll << 32))
165 scl_data->ratios.horz.value--;
195 if (IDENTITY_RATIO(scl_data->ratios.horz))
amdgpu_dcn10_dpp_dscl.c 185 if (data->ratios.horz.value == one
198 if (data->ratios.horz.value == one && data->ratios.vert.value == one)
310 uint32_t h_2tap_sharp_factor = scl_data->sharpness.horz;
340 scl_data->taps.h_taps, scl_data->ratios.horz);
589 SCL_H_SCALE_RATIO, dc_fixpt_u3d19(data->ratios.horz) << 5);
amdgpu_dcn10_hw_sequencer.c 2955 .h_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.horz,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_dpp.c 399 if (scl_data->ratios.horz.value == (8ll << 32))
400 scl_data->ratios.horz.value--;
410 if (dc_fixpt_ceil(scl_data->ratios.horz) > 4)
442 if (IDENTITY_RATIO(scl_data->ratios.horz))
amdgpu_dcn20_resource.c 1764 sd->ratios.horz, sd->recout.width - new_width));
1778 sd->ratios.horz, sd->recout.width - new_width));
1783 sd->ratios.horz, sd->h_active - sd->recout.x));
2147 pipes[pipe_cnt].pipe.scale_ratio_depth.hscl_ratio = (double) scl->ratios.horz.value / (1ULL<<32);
2153 || scl->ratios.horz.value != dc_fixpt_one.value
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
amdgpu_dce_transform.c 264 dc_fixpt_u2d19(data->ratios.horz) << 5;
271 data->ratios.horz,
358 coeffs_h = get_filter_coeffs_16p(data->taps.h_taps, data->ratios.horz);
927 scl_data->taps.h_taps = decide_taps(scl_data->ratios.horz, in_taps->h_taps, false);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
amdgpu_dc_resource.c 721 pipe_ctx->plane_res.scl_data.ratios.horz = dc_fixpt_from_fraction(
729 pipe_ctx->plane_res.scl_data.ratios.horz.value *= 2;
735 pipe_ctx->plane_res.scl_data.ratios.horz.value = div64_s64(
736 pipe_ctx->plane_res.scl_data.ratios.horz.value * in_w, out_w);
738 pipe_ctx->plane_res.scl_data.ratios.horz_c = pipe_ctx->plane_res.scl_data.ratios.horz;
746 pipe_ctx->plane_res.scl_data.ratios.horz = dc_fixpt_truncate(
747 pipe_ctx->plane_res.scl_data.ratios.horz, 19);
890 dc_fixpt_add_int(data->ratios.horz, data->taps.h_taps + 1), 2), 19);
910 orthogonal_rotation ? data->ratios.vert : data->ratios.horz,
928 orthogonal_rotation ? data->ratios.horz : data->ratios.vert
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
amdgpu_dce110_transform_v.c 383 dc_fixpt_u2d19(data->ratios.horz) << 5;
568 coeffs_h = get_filter_coeffs_64p(data->taps.h_taps, data->ratios.horz);
amdgpu_dce110_hw_sequencer.c 2685 .h_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.horz,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/
amdgpu_dcn_calcs.c 390 input->scale_ratio_depth.hscl_ratio = pipe->plane_res.scl_data.ratios.horz.value/4294967296.0;
951 ASSERT(pipe->plane_res.scl_data.ratios.horz.value != dc_fixpt_one.value
956 ASSERT(pipe->plane_res.scl_data.ratios.horz.value != dc_fixpt_one.value
amdgpu_dce_calcs.c 2809 data->h_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.horz.value);
2865 pipe[i].bottom_pipe->plane_res.scl_data.ratios.horz.value);
2911 data->h_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.horz.value);

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