| /src/sys/arch/arm/imx/ |
| imx51_ipuv3var.h | 64 short hsync_width; member in struct:lcd_panel_geometry
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| imx51_ipuv3.c | 414 __DI_SW_GEN0(geom->panel_width + geom->hsync_width +
421 __DI_SW_GEN0(geom->panel_width + geom->hsync_width +
423 __DI_SW_GEN1(1, 1, 0, geom->hsync_width * 2, 1, 0, 0),
445 __DI_SW_GEN0(0, 1, geom->hsync_width + geom->left, 1),
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| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_encoders.c | 178 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start; local in function:amdgpu_panel_mode_fixup
189 adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;
202 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
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| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_encoders.c | 339 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start; local in function:radeon_panel_mode_fixup
352 adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;
367 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
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| /src/sys/arch/evbarm/netwalker/ |
| netwalker_lcd.c | 108 .hsync_width = 8,
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| /src/sys/external/bsd/drm2/dist/drm/ |
| drm_edid.c | 5033 unsigned hsync_width = (timings->hsw[0] | timings->hsw[1] << 8) + 1; local in function:drm_mode_displayid_detailed
5047 mode->hsync_end = mode->hsync_start + hsync_width;
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