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    Searched refs:hubps (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_hw_sequencer_debug.c 139 struct hubp *hubp = pool->hubps[i];
209 struct dcn_hubp_state *s = &(TO_DCN10_HUBP(pool->hubps[i])->state);
217 pool->hubps[i]->inst, rq_regs->drq_expansion_mode, rq_regs->prq_expansion_mode, rq_regs->mrq_expansion_mode,
254 struct dcn_hubp_state *s = &(TO_DCN10_HUBP(pool->hubps[i])->state);
265 pool->hubps[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_next_start,
308 struct dcn_hubp_state *s = &(TO_DCN10_HUBP(pool->hubps[i])->state);
316 pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_vblank,
515 struct hubp *hubp = pool->hubps[i];
amdgpu_dcn10_resource.c 960 if (pool->base.hubps[i] != NULL) {
961 kfree(TO_DCN10_HUBP(pool->base.hubps[i]));
962 pool->base.hubps[i] = NULL;
1154 idle_pipe->plane_res.hubp = pool->hubps[idle_pipe->pipe_idx];
1500 pool->base.hubps[j] = dcn10_hubp_create(ctx, i);
1501 if (pool->base.hubps[j] == NULL) {
amdgpu_dcn10_hw_sequencer.c 168 struct hubp *hubp = pool->hubps[i];
200 struct dcn_hubp_state *s = &(TO_DCN10_HUBP(pool->hubps[i])->state);
205 pool->hubps[i]->inst, rq_regs->drq_expansion_mode, rq_regs->prq_expansion_mode, rq_regs->mrq_expansion_mode,
225 struct dcn_hubp_state *s = &(TO_DCN10_HUBP(pool->hubps[i])->state);
232 pool->hubps[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_next_start,
257 struct dcn_hubp_state *s = &(TO_DCN10_HUBP(pool->hubps[i])->state);
262 pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_vblank,
662 struct hubp *hubp = dc->res_pool->hubps[0];
682 struct hubp *hubp = dc->res_pool->hubps[0];
692 if (!dc->res_pool->hubps[i]->power_gated
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/
core_types.h 162 struct hubp *hubps[MAX_PIPES]; member in struct:resource_pool
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/
amdgpu_dcn21_resource.c 900 if (pool->base.hubps[i] != NULL) {
901 kfree(TO_DCN20_HUBP(pool->base.hubps[i]));
902 pool->base.hubps[i] = NULL;
1806 pool->base.hubps[j] = dcn21_hubp_create(ctx, i);
1807 if (pool->base.hubps[j] == NULL) {
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_resource.c 1345 if (pool->base.hubps[i] != NULL) {
1346 kfree(TO_DCN20_HUBP(pool->base.hubps[i]));
1347 pool->base.hubps[i] = NULL;
1738 next_odm_pipe->plane_res.hubp = pool->hubps[next_odm_pipe->pipe_idx];
1813 secondary_pipe->plane_res.hubp = pool->hubps[secondary_pipe->pipe_idx];
3002 idle_pipe->plane_res.hubp = pool->hubps[idle_pipe->pipe_idx];
3675 pool->base.hubps[i] = dcn20_hubp_create(ctx, i);
3676 if (pool->base.hubps[i] == NULL) {
amdgpu_dcn20_hwseq.c 2353 struct hubp *hubp = dc->res_pool->hubps[i];
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
amdgpu_dc_resource.c 1245 split_pipe->plane_res.hubp = pool->hubps[i];
1648 pipe_ctx->plane_res.hubp = pool->hubps[i];
1919 pipe_ctx->plane_res.hubp = pool->hubps[tg_inst];
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/
amdgpu_dcn_calcs.c 526 secondary_pipe->plane_res.hubp = pool->hubps[secondary_pipe->pipe_idx];

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