| /src/sys/arch/sparc/sparc/ |
| emul.c | 156 op.num = code->i_op3.i_op3;
161 op.bits.cc ? "cc" : "", REGNAME(code->i_op3.i_rd),
162 REGNAME(code->i_op3.i_rs1));
264 op.num = code.i_loadstore.i_op3;
274 if ((error = readgpreg(tf, code.i_op3.i_rs1, &rs1)) != 0) {
296 "w*hd"[op.bits.sz], op.bits.fl ? 'f' : REGNAME(code.i_op3.i_rd),
297 REGNAME(code.i_op3.i_rs1));
312 error = readfpreg(l, code.i_op3.i_rd, &data.i[0]);
316 error = readfpreg(l, code.i_op3.i_rd + 1
[all...] |
| db_interface.c | 558 return (insn.i_op3.i_op3 == IOP3_JMPL) && !db_inst_return(inst);
610 insn.i_op3.i_op3 == IOP3_RETT);
624 switch (insn.i_op3.i_op3) {
664 switch (insn.i_op3.i_op3) {
|
| /src/sys/arch/sparc64/sparc64/ |
| emul.c | 155 op.num = code->i_op3.i_op3;
160 op.bits.cc ? "cc" : "", REGNAME(code->i_op3.i_rd),
161 REGNAME(code->i_op3.i_rs1));
261 op.num = code.i_loadstore.i_op3;
271 if ((error = readgpreg(tf, code.i_op3.i_rs1, &rs1)) != 0) {
287 "w*hd"[op.bits.sz], op.bits.fl ? 'f' : REGNAME(code.i_op3.i_rd),
288 REGNAME(code.i_op3.i_rs1));
303 error = readfpreg(l, code.i_op3.i_rd, &data.i[0]);
307 error = readfpreg(l, code.i_op3.i_rd + 1
[all...] |
| db_interface.c | 1229 return (insn.i_op3.i_op3 == IOP3_JMPL) && !db_inst_return(inst);
1280 insn.i_op3.i_op3 == IOP3_RETT);
1294 switch (insn.i_op3.i_op3) {
1334 switch (insn.i_op3.i_op3) {
|
| /src/sys/arch/sparc/include/ |
| instr.h | 232 u_int i_op3:6; /* second-level decode */ member in struct:instr::__anon0aa89e890808
235 } i_op3; member in union:instr
245 u_int i_op3:6; /* second-level decode (see IOP3_mem) */ member in struct:instr::__anon0aa89e890908
259 u_int i_op3:6; /* second-level decode */ member in struct:instr::__anon0aa89e890a08
267 u_int i_op3:6; /* second-level decode */ member in struct:instr::__anon0aa89e890b08
276 u_int i_op3:6; /* second-level decode (see IOP3_reg) */ member in struct:instr::__anon0aa89e890c08
295 u_int i_op3:6; /* second-level decode */ member in struct:instr::__anon0aa89e890d08
306 u_int i_op3:6; /* second-level decode */ member in struct:instr::__anon0aa89e890e08
320 u_int i_op3:6; /* second-level decode */ member in struct:instr::__anon0aa89e890f08
|
| /src/sys/arch/sparc/fpu/ |
| fpu.c | 207 (instr.i_op3.i_op3 != IOP3_FPop1 &&
208 instr.i_op3.i_op3 != IOP3_FPop2))
356 if (instr.i_op3.i_op3 == IOP3_FPop2 && (opf&0xff0) != (FCMP&0xff0)) {
|
