| /src/sys/arch/powerpc/include/ |
| db_machdep.h | 51 u_int32_t iar; member in struct:powerpc_saved_state
66 #define PC_REGS(regs) (*(db_addr_t *)&(regs)->iar)
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| /src/sys/arch/sparc64/dev/ |
| psm.c | 332 psm_ecmd_rd16(struct psm_softc *sc, uint16_t *data, uint8_t iar, uint8_t mode,
346 PUT8(sc, PSM_IAR, iar);
366 psm_ecmd_rd8(struct psm_softc *sc, uint8_t *data, uint8_t iar, uint8_t mode,
380 PUT8(sc, PSM_IAR, iar);
400 psm_ecmd_wr8(struct psm_softc *sc, uint8_t data, uint8_t iar, uint8_t mode,
416 PUT8(sc, PSM_IAR, iar);
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| /src/sys/arch/amiga/dev/ |
| if_esreg.h | 46 volatile u_short iar[3]; /* Individual Address Registers */ member in struct:smcregs::__anonf052b2be0208
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| if_es.c | 213 printf("CR %04x BAR %04x IAR %04x %04x %04x GPR %04x CTR %04x\n",
214 SWAP(smc->b1.cr), SWAP(smc->b1.bar), smc->b1.iar[0], smc->b1.iar[1],
215 smc->b1.iar[2], smc->b1.gpr, SWAP(smc->b1.ctr));
278 smc->b1.iar[0] = *((const unsigned short *) &CLLADDR(ifp->if_sadl)[0]);
279 smc->b1.iar[1] = *((const unsigned short *) &CLLADDR(ifp->if_sadl)[2]);
280 smc->b1.iar[2] = *((const unsigned short *) &CLLADDR(ifp->if_sadl)[4]);
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| /src/sys/arch/powerpc/powerpc/ |
| kgdb_machdep.c | 263 gdb_regs[KGDB_PPC_PC_REG] = regs->iar;
282 regs->iar = gdb_regs[KGDB_PPC_PC_REG];
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| db_trace.c | 112 { "iar", (long *)&ddb_regs.iar, FCN_NULL, NULL },
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| db_interface.c | 235 DDB_REGS->iar = tf->tf_srr0;
276 tf->tf_srr0 = DDB_REGS->iar;
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| /src/sys/arch/arm/cortex/ |
| gic.c | 331 * Raise ci_hwpl (and PMR) to ci_cpl and IAR will tell us if the
347 uint32_t iar = gicc_read(sc, GICC_IAR); local in function:armgic_irq_handler
348 uint32_t irq = __SHIFTOUT(iar, GICC_IAR_IRQ);
352 iar = gicc_read(sc, GICC_IAR);
353 irq = __SHIFTOUT(iar, GICC_IAR_IRQ);
364 //const uint32_t cpuid = __SHIFTOUT(iar, GICC_IAR_CPUID_MASK);
396 gicc_write(sc, GICC_EOIR, iar);
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| gicv3.c | 746 const uint32_t iar = icc_iar1_read(); local in function:gicv3_irq_handler
748 const uint32_t irq = __SHIFTOUT(iar, ICC_IAR_INTID);
771 icc_eoi1r_write(iar);
785 icc_eoi1r_write(iar);
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