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  /src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/src/
amdgpu_dmub_dcn20.c 194 const struct dmub_region *inbox1)
199 REG_WRITE(DMCUB_INBOX1_SIZE, inbox1->top - inbox1->base);
amdgpu_dmub_srv.c 342 struct dmub_region inbox1; local in function:dmub_srv_hw_init
388 inbox1.base = cw4.region.base;
389 inbox1.top = cw4.region.top;
406 dmub->hw_funcs.setup_mailbox(dmub, &inbox1);
dmub_dcn20.h 178 const struct dmub_region *inbox1);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/inc/
dmub_srv.h 254 const struct dmub_region *inbox1);

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