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  /src/sys/external/bsd/vchiq/dist/interface/vchiq_arm/
vchiq_debugfs.h 48 int vchiq_debugfs_add_instance(VCHIQ_INSTANCE_T instance);
50 void vchiq_debugfs_remove_instance(VCHIQ_INSTANCE_T instance);
vchiq_kern_lib.c 72 VCHIQ_INSTANCE_T instance = NULL; local in function:vchiq_initialise
94 instance = kzalloc(sizeof(*instance), GFP_KERNEL);
95 if (!instance) {
97 "%s: error allocating vchiq instance", __func__);
101 instance->connected = 0;
102 instance->state = state;
103 lmutex_init(&instance->bulk_waiter_list_mutex);
104 INIT_LIST_HEAD(&instance->bulk_waiter_list);
106 *instanceOut = instance;
382 VCHIQ_INSTANCE_T instance; local in function:vchiq_blocking_bulk_transfer
    [all...]
vchiq_arm.c 55 /* Some per-instance constants */
108 VCHIQ_INSTANCE_T instance; member in struct:user_service_struct
230 add_completion(VCHIQ_INSTANCE_T instance, VCHIQ_REASON_T reason,
238 insert = instance->completion_insert;
239 while ((insert - instance->completion_remove) >= MAX_COMPLETIONS) {
246 if (down_interruptible(&instance->remove_event) != 0) {
252 if (instance->closing) {
260 completion = &instance->completions[insert & (MAX_COMPLETIONS - 1)];
272 if (instance->use_close_delivered)
283 instance->completion_insert = ++insert
307 VCHIQ_INSTANCE_T instance; local in function:service_callback
452 VCHIQ_INSTANCE_T instance = fp->f_data; local in function:vchiq_ioctl
1143 VCHIQ_INSTANCE_T instance = NULL; local in function:vchiq_open
1215 VCHIQ_INSTANCE_T instance = fp->f_data; local in function:vchiq_close
1400 VCHIQ_INSTANCE_T instance; local in function:vchiq_dump_platform_instances
1411 VCHIQ_INSTANCE_T instance; local in function:vchiq_dump_platform_instances
1638 VCHIQ_INSTANCE_T instance; local in function:vchiq_keepalive_thread_func
    [all...]
vchiq_if.h 130 extern VCHIQ_STATUS_T vchiq_shutdown(VCHIQ_INSTANCE_T instance);
131 extern VCHIQ_STATUS_T vchiq_connect(VCHIQ_INSTANCE_T instance);
132 extern VCHIQ_STATUS_T vchiq_add_service(VCHIQ_INSTANCE_T instance,
135 extern VCHIQ_STATUS_T vchiq_open_service(VCHIQ_INSTANCE_T instance,
174 extern VCHIQ_STATUS_T vchiq_get_config(VCHIQ_INSTANCE_T instance,
179 extern VCHIQ_STATUS_T vchiq_remote_use(VCHIQ_INSTANCE_T instance,
181 extern VCHIQ_STATUS_T vchiq_remote_release(VCHIQ_INSTANCE_T instance);
vchiq_arm.h 194 // vchiq_instance_get_debugfs_node(VCHIQ_INSTANCE_T instance);
197 vchiq_instance_get_use_count(VCHIQ_INSTANCE_T instance);
200 vchiq_instance_get_pid(VCHIQ_INSTANCE_T instance);
203 vchiq_instance_get_trace(VCHIQ_INSTANCE_T instance);
206 vchiq_instance_set_trace(VCHIQ_INSTANCE_T instance, int trace);
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_arct_reg_init.c 39 adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i]));
40 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i]));
41 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i]));
42 adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i]));
43 adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIF0_BASE.instance[i]));
44 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i]));
45 adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i]));
46 adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i]));
47 adev->reg_offset[DF_HWIP][i] = (uint32_t *)(&(DF_BASE.instance[i]));
48 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i]))
    [all...]
amdgpu_navi10_reg_init.c 39 adev->reg_offset[GC_HWIP][i] = (const uint32_t *)(&(GC_BASE.instance[i]));
40 adev->reg_offset[HDP_HWIP][i] = (const uint32_t *)(&(HDP_BASE.instance[i]));
41 adev->reg_offset[MMHUB_HWIP][i] = (const uint32_t *)(&(MMHUB_BASE.instance[i]));
42 adev->reg_offset[ATHUB_HWIP][i] = (const uint32_t *)(&(ATHUB_BASE.instance[i]));
43 adev->reg_offset[NBIO_HWIP][i] = (const uint32_t *)(&(NBIO_BASE.instance[i]));
44 adev->reg_offset[MP0_HWIP][i] = (const uint32_t *)(&(MP0_BASE.instance[i]));
45 adev->reg_offset[MP1_HWIP][i] = (const uint32_t *)(&(MP1_BASE.instance[i]));
46 adev->reg_offset[VCN_HWIP][i] = (const uint32_t *)(&(VCN_BASE.instance[i]));
47 adev->reg_offset[DF_HWIP][i] = (const uint32_t *)(&(DF_BASE.instance[i]));
48 adev->reg_offset[DCE_HWIP][i] = (const uint32_t *)(&(DCN_BASE.instance[i]))
    [all...]
amdgpu_navi12_reg_init.c 39 adev->reg_offset[GC_HWIP][i] = (const uint32_t *)(&(GC_BASE.instance[i]));
40 adev->reg_offset[HDP_HWIP][i] = (const uint32_t *)(&(HDP_BASE.instance[i]));
41 adev->reg_offset[MMHUB_HWIP][i] = (const uint32_t *)(&(MMHUB_BASE.instance[i]));
42 adev->reg_offset[ATHUB_HWIP][i] = (const uint32_t *)(&(ATHUB_BASE.instance[i]));
43 adev->reg_offset[NBIO_HWIP][i] = (const uint32_t *)(&(NBIF0_BASE.instance[i]));
44 adev->reg_offset[MP0_HWIP][i] = (const uint32_t *)(&(MP0_BASE.instance[i]));
45 adev->reg_offset[MP1_HWIP][i] = (const uint32_t *)(&(MP1_BASE.instance[i]));
46 adev->reg_offset[VCN_HWIP][i] = (const uint32_t *)(&(UVD0_BASE.instance[i]));
47 adev->reg_offset[DF_HWIP][i] = (const uint32_t *)(&(DF_BASE.instance[i]));
48 adev->reg_offset[DCE_HWIP][i] = (const uint32_t *)(&(DMU_BASE.instance[i]))
    [all...]
amdgpu_navi14_reg_init.c 39 adev->reg_offset[GC_HWIP][i] = (const uint32_t *)(&(GC_BASE.instance[i]));
40 adev->reg_offset[HDP_HWIP][i] = (const uint32_t *)(&(HDP_BASE.instance[i]));
41 adev->reg_offset[MMHUB_HWIP][i] = (const uint32_t *)(&(MMHUB_BASE.instance[i]));
42 adev->reg_offset[ATHUB_HWIP][i] = (const uint32_t *)(&(ATHUB_BASE.instance[i]));
43 adev->reg_offset[NBIO_HWIP][i] = (const uint32_t *)(&(NBIF0_BASE.instance[i]));
44 adev->reg_offset[MP0_HWIP][i] = (const uint32_t *)(&(MP0_BASE.instance[i]));
45 adev->reg_offset[MP1_HWIP][i] = (const uint32_t *)(&(MP1_BASE.instance[i]));
46 adev->reg_offset[VCN_HWIP][i] = (const uint32_t *)(&(UVD0_BASE.instance[i]));
47 adev->reg_offset[DF_HWIP][i] = (const uint32_t *)(&(DF_BASE.instance[i]));
48 adev->reg_offset[DCE_HWIP][i] = (const uint32_t *)(&(DMU_BASE.instance[i]))
    [all...]
amdgpu_vega10_reg_init.c 39 adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i]));
40 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i]));
41 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i]));
42 adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i]));
43 adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIO_BASE.instance[i]));
44 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i]));
45 adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i]));
46 adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i]));
47 adev->reg_offset[VCE_HWIP][i] = (uint32_t *)(&(VCE_BASE.instance[i]));
48 adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(VCN_BASE.instance[i]))
    [all...]
amdgpu_vega20_reg_init.c 39 adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i]));
40 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i]));
41 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i]));
42 adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i]));
43 adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIO_BASE.instance[i]));
44 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i]));
45 adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i]));
46 adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i]));
47 adev->reg_offset[VCE_HWIP][i] = (uint32_t *)(&(VCE_BASE.instance[i]));
48 adev->reg_offset[DF_HWIP][i] = (uint32_t *)(&(DF_BASE.instance[i]))
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/
dce120_timing_generator.h 39 uint32_t instance,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce80/
dce80_timing_generator.h 38 uint32_t instance,
  /src/sys/arch/powerpc/ibm4xx/dev/
rgmii.c 49 rgmii_attach(device_t self, int instance,
57 instance %= 2;
59 rgmii_disable(self, instance);
61 ssr &= ~SSR_SP(instance, SSR_SP_MASK);
70 rgmii_enable(device_t self, int instance)
75 instance %= 2;
79 fer |= FER_MDIOEN(instance);
84 rgmii_disable(device_t self, int instance)
89 instance %= 2;
97 rgmii_speed(device_t self, int instance, int speed
    [all...]
  /src/sys/external/isc/libsodium/dist/src/libsodium/crypto_pwhash/argon2/
argon2-core.h 90 * Argon2 instance: memory pointer, number of passes, amount of memory, type,
132 * @param instance Pointer to the current instance
139 static uint32_t index_alpha(const argon2_instance_t *instance,
167 position->slice * instance->segment_length +
171 position->slice * instance->segment_length +
178 reference_area_size = instance->lane_length -
179 instance->segment_length + position->index -
182 reference_area_size = instance->lane_length -
183 instance->segment_length
    [all...]
argon2-fill-block-ref.c 106 * @param instance Pointer to the current instance
109 * @pre pseudo_rands must point to @a instance->segment_length allocated values
112 generate_addresses(const argon2_instance_t *instance,
121 if (instance != NULL && position != NULL) {
125 input_block.v[3] = instance->memory_blocks;
126 input_block.v[4] = instance->passes;
127 input_block.v[5] = instance->type;
129 for (i = 0; i < instance->segment_length; ++i) {
144 fill_segment_ref(const argon2_instance_t *instance, argon2_position_t position
    [all...]
argon2-core.c 131 * @param instance pointer to the current instance
134 static void clear_memory(argon2_instance_t *instance, int clear);
137 clear_memory(argon2_instance_t *instance, int clear)
141 if (instance->region != NULL) {
142 sodium_memzero(instance->region->memory,
143 sizeof(block) * instance->memory_blocks);
145 if (instance->pseudo_rands != NULL) {
146 sodium_memzero(instance->pseudo_rands,
147 sizeof(uint64_t) * instance->segment_length)
    [all...]
argon2-fill-block-avx2.c 101 generate_addresses(const argon2_instance_t *instance,
110 if (instance != NULL && position != NULL) {
114 input_block.v[3] = instance->memory_blocks;
115 input_block.v[4] = instance->passes;
116 input_block.v[5] = instance->type;
118 for (i = 0; i < instance->segment_length; ++i) {
144 fill_segment_avx2(const argon2_instance_t *instance,
157 if (instance == NULL) {
161 if (instance->type == Argon2_id &&
166 pseudo_rands = instance->pseudo_rands
    [all...]
argon2-fill-block-avx512f.c 106 generate_addresses(const argon2_instance_t *instance,
115 if (instance != NULL && position != NULL) {
119 input_block.v[3] = instance->memory_blocks;
120 input_block.v[4] = instance->passes;
121 input_block.v[5] = instance->type;
123 for (i = 0; i < instance->segment_length; ++i) {
149 fill_segment_avx512f(const argon2_instance_t *instance,
162 if (instance == NULL) {
166 if (instance->type == Argon2_id &&
171 pseudo_rands = instance->pseudo_rands
    [all...]
argon2-fill-block-ssse3.c 100 generate_addresses(const argon2_instance_t *instance,
109 if (instance != NULL && position != NULL) {
113 input_block.v[3] = instance->memory_blocks;
114 input_block.v[4] = instance->passes;
115 input_block.v[5] = instance->type;
117 for (i = 0; i < instance->segment_length; ++i) {
143 fill_segment_ssse3(const argon2_instance_t *instance,
156 if (instance == NULL) {
160 if (instance->type == Argon2_id &&
165 pseudo_rands = instance->pseudo_rands
    [all...]
argon2.c 33 argon2_instance_t instance; local in function:argon2_ctx
55 instance.region = NULL;
56 instance.passes = context->t_cost;
57 instance.current_pass = ~ 0U;
58 instance.memory_blocks = memory_blocks;
59 instance.segment_length = segment_length;
60 instance.lane_length = segment_length * ARGON2_SYNC_POINTS;
61 instance.lanes = context->lanes;
62 instance.threads = context->threads;
63 instance.type = type
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_dp_auxch.c 68 int instance = chan->rec.i2c_id & 0xf; local in function:radeon_dp_aux_transfer_native
109 tmp = RREG32(AUX_CONTROL + aux_offset[instance]);
115 WREG32(AUX_CONTROL + aux_offset[instance], tmp);
118 WREG32(AUX_SW_CONTROL + aux_offset[instance],
120 WREG32(AUX_SW_CONTROL + aux_offset[instance],
126 WREG32(AUX_SW_DATA + aux_offset[instance],
130 WREG32(AUX_SW_DATA + aux_offset[instance],
134 WREG32(AUX_SW_DATA + aux_offset[instance],
138 WREG32(AUX_SW_DATA + aux_offset[instance],
144 WREG32(AUX_SW_DATA + aux_offset[instance],
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/gt/
intel_engine_user.h 18 intel_engine_lookup_user(struct drm_i915_private *i915, u8 class, u8 instance);
intel_engine_user.c 68 intel_engine_lookup_user(struct drm_i915_private *i915, u8 class, u8 instance)
71 const u8 key[2] = {class, instance};
83 instance > it->uabi_instance)
85 else if (instance < it->uabi_instance)
119 if (a->instance < b->instance)
121 if (a->instance > b->instance)
203 u8 instance; member in struct:legacy_ring
220 if (GEM_DEBUG_WARN_ON(ring->instance >= map[ring->class].max)
    [all...]
  /src/sys/arch/powerpc/booke/
e500_autoconf.c 94 e500_truth_decode(u_int instance, uint32_t data,
103 tab->tt_instance, instance,
107 && tab->tt_instance == instance

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