| /src/external/gpl3/gdb/dist/sim/microblaze/ |
| microblaze-sim.h | 39 int insts; member in struct:microblaze_regset
|
| interp.c | 108 CPU.insts = 0;
126 int insts; local
138 insts = 0;
166 insts += 1;
198 insts ++;
263 insts++;
311 CPU.insts += insts; /* instructions done ... */
312 CPU.cycles += insts; /* and each takes a cycle */
371 CPU.insts);
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/microblaze/ |
| microblaze-sim.h | 39 int insts; member in struct:microblaze_regset
|
| interp.c | 108 CPU.insts = 0;
126 int insts; local
138 insts = 0;
166 insts += 1;
198 insts ++;
263 insts++;
311 CPU.insts += insts; /* instructions done ... */
312 CPU.cycles += insts; /* and each takes a cycle */
371 CPU.insts);
[all...] |
| /src/external/gpl3/gdb/dist/sim/mcore/ |
| mcore-sim.h | 59 int insts; member in struct:mcore_sim_cpu
|
| interp.c | 231 gr[RET1] = mcore_cpu->insts;
305 int insts; local
319 insts = 0;
334 insts ++;
358 int cycs = (mcore_cpu->cycles + (insts + bonus_cycles +
393 WLbcyc = mcore_cpu->cycles + insts
1224 mcore_cpu->insts += insts; /* instructions done ... */
1225 mcore_cpu->cycles += insts; /* and each takes a cycle */
1305 mcore_cpu->insts);
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/mcore/ |
| mcore-sim.h | 59 int insts; member in struct:mcore_sim_cpu
|
| interp.c | 231 gr[RET1] = mcore_cpu->insts;
305 int insts; local
319 insts = 0;
334 insts ++;
358 int cycs = (mcore_cpu->cycles + (insts + bonus_cycles +
393 WLbcyc = mcore_cpu->cycles + insts
1224 mcore_cpu->insts += insts; /* instructions done ... */
1225 mcore_cpu->cycles += insts; /* and each takes a cycle */
1305 mcore_cpu->insts);
[all...] |
| /src/external/gpl3/gdb/dist/sim/sh/ |
| sh-sim.h | 90 int insts; member in struct:__anon19969::__anon19970
|
| interp.c | 1701 register int insts = 0; local
1781 insts++;
1853 saved_state.asregs.insts += insts;
2278 saved_state.asregs.insts);
|
| /src/external/gpl3/gdb.old/dist/sim/sh/ |
| sh-sim.h | 90 int insts; member in struct:__anon22708::__anon22709
|
| interp.c | 1701 register int insts = 0; local
1781 insts++;
1853 saved_state.asregs.insts += insts;
2278 saved_state.asregs.insts);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonShuffler.h | 222 packet_range insts(HexagonPacket &P) { function in class:llvm::HexagonShuffler
225 const_packet_range insts(HexagonPacket const &P) const { function in class:llvm::HexagonShuffler
228 packet_range insts() { return make_range(begin(), end()); } function in class:llvm::HexagonShuffler
229 const_packet_range insts() const { return make_range(cbegin(), cend()); } function in class:llvm::HexagonShuffler
234 return llvm::any_of(insts(), [&](HexagonInstr const &I) {
|
| HexagonShuffler.cpp | 196 for (HexagonInstr &ISJ : insts()) {
228 for (HexagonInstr &ISJ : insts()) {
311 for (HexagonInstr &ISJ : insts()) {
407 llvm::none_of(insts(), [&](HexagonInstr const &I) {
570 const bool HasOnlySlot3 = llvm::any_of(insts(), [&](HexagonInstr const &I) {
615 llvm::all_of(insts(PacketResult), [&AuctionCore](HexagonInstr const &I) {
622 for (HexagonInstr const &ISJ : insts(PacketResult))
671 for (HexagonInstr const &ISJ : insts()) {
|
| /src/external/apache2/llvm/dist/llvm/utils/ |
| shuffle_select_fuzz_tester.py | 288 insts = []
302 insts.append(shuf_inst)
317 insts.append(select_inst)
327 return insts
359 insts = gen_insts(inputs, ty)
365 insts_str = ''.join([inst.dump() for inst in insts])
|
| /src/external/gpl3/binutils/dist/gas/config/ |
| tc-tic4x.c | 1225 static tic4x_inst_t *insts = NULL; local
1229 if (insts == NULL)
1233 /* Allocate memory for additional insts. */
1234 insts = XNEWVEC (tic4x_inst_t, 1024);
1236 insts[iindex].name = names;
1237 insts[iindex].opcode = opcode;
1238 insts[iindex].opmask = 0xffffffff;
1239 insts[iindex].args = args;
1246 return &insts[iindex - 1];
1251 tic4x_inst_add (const tic4x_inst_t *insts)
[all...] |
| /src/external/gpl3/binutils.old/dist/gas/config/ |
| tc-tic4x.c | 1225 static tic4x_inst_t *insts = NULL; local
1229 if (insts == NULL)
1233 /* Allocate memory for additional insts. */
1234 insts = XNEWVEC (tic4x_inst_t, 1024);
1236 insts[iindex].name = names;
1237 insts[iindex].opcode = opcode;
1238 insts[iindex].opmask = 0xffffffff;
1239 insts[iindex].args = args;
1246 return &insts[iindex - 1];
1251 tic4x_inst_add (const tic4x_inst_t *insts)
[all...] |
| /src/external/gpl3/gdb/dist/sim/pru/ |
| pru.h | 162 int insts; member in struct:pru_regset
|
| interp.c | 272 CPU.insts = 0;
621 CPU.insts += 1; /* One instruction completed ... */
|
| /src/external/gpl3/gdb.old/dist/sim/pru/ |
| pru.h | 162 int insts; member in struct:pru_regset
|
| interp.c | 272 CPU.insts = 0;
621 CPU.insts += 1; /* One instruction completed ... */
|
| /src/external/bsd/elftoolchain/dist/libdwarf/ |
| libdwarf_frame.c | 553 uint8_t *insts, Dwarf_Unsigned len, Dwarf_Unsigned caf, Dwarf_Signed daf,
588 p = insts;
920 _dwarf_frame_convert_inst(Dwarf_Debug dbg, uint8_t addr_size, uint8_t *insts,
993 p = insts;
998 SET_INSTR_OFFSET(p - insts);
1123 _dwarf_frame_get_fop(Dwarf_Debug dbg, uint8_t addr_size, uint8_t *insts,
1131 ret = _dwarf_frame_convert_inst(dbg, addr_size, insts, len, &count,
1141 ret = _dwarf_frame_convert_inst(dbg, addr_size, insts, len, &count,
|
| /src/external/gpl3/gdb/dist/sim/moxie/ |
| interp.c | 115 unsigned long long insts; /* instruction counter */ member in struct:moxie_regset
1116 cpu.asregs.insts++;
|
| /src/external/gpl3/gdb.old/dist/sim/moxie/ |
| interp.c | 115 unsigned long long insts; /* instruction counter */ member in struct:moxie_regset
1116 cpu.asregs.insts++;
|
| /src/external/apache2/llvm/dist/llvm/lib/AsmParser/ |
| LLLexer.cpp | 763 KEYWORD(insts);
|
