| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| intel-ixp43x-kixrp435.dts | 3 * Device Tree file for the Intel KIXRP435 Control Plane
9 #include "intel-ixp43x.dtsi"
10 #include "intel-ixp4xx-reference-design.dtsi"
14 model = "Intel KIXRP435 Reference Design";
15 compatible = "intel,kixrp435", "intel,ixp43x";
22 compatible = "intel,ixp4xx-flash", "cfi-flash";
25 intel,ixp4xx-eb-write-enable = <1>;
65 intel,npe-handle = <&npe 0>;
|
| intel-ixp42x-ixdp425.dts | 3 * Device Tree file for the Intel IXDP425 also known as IXCDP1100 Control Plane
13 #include "intel-ixp42x.dtsi"
14 #include "intel-ixp4xx-reference-design.dtsi"
18 model = "Intel IXDP425/IXCDP1100 Richfield Reference Design";
19 compatible = "intel,ixdp425", "intel,ixp42x";
26 compatible = "intel,ixp4xx-flash", "cfi-flash";
29 intel,ixp4xx-eb-write-enable = <1>;
|
| intel-ixp42x-arcom-vulcan.dts | 10 #include "intel-ixp42x.dtsi"
15 compatible = "arcom,vulcan", "intel,ixp42x";
42 compatible = "intel,ixp4xx-flash", "cfi-flash";
55 intel,ixp4xx-eb-t3 = <3>;
56 intel,ixp4xx-eb-byte-access-on-halfword = <1>;
57 intel,ixp4xx-eb-write-enable = <1>;
71 intel,ixp4xx-eb-t3 = <1>;
72 intel,ixp4xx-eb-t4 = <2>;
73 intel,ixp4xx-eb-ahb-split-transfers = <1>;
74 intel,ixp4xx-eb-write-enable = <1>
[all...] |
| intel-ixp43x-gateworks-gw2358.dts | 8 #include "intel-ixp43x.dtsi"
12 compatible = "gateworks,gw2358", "intel,ixp43x";
82 compatible = "intel,ixp4xx-flash", "cfi-flash";
85 intel,ixp4xx-eb-write-enable = <1>;
99 compatible = "intel,ixp4xx-compact-flash";
105 intel,ixp4xx-eb-t1 = <3>; // 3 cycles extra address phase
106 intel,ixp4xx-eb-t2 = <3>; // 3 cycles extra setup phase
107 intel,ixp4xx-eb-t3 = <15>; // 15 cycles extra strobe phase
108 intel,ixp4xx-eb-t4 = <3>; // 3 cycles extra hold phase
109 intel,ixp4xx-eb-t5 = <15>; // 15 cycles extra recovery phas
[all...] |
| intel-ixp42x-gateworks-gw2348.dts | 9 #include "intel-ixp42x.dtsi"
14 compatible = "gateworks,gw2348", "intel,ixp42x";
69 compatible = "intel,ixp4xx-flash", "cfi-flash";
72 intel,ixp4xx-eb-write-enable = <1>;
83 compatible = "intel,ixp4xx-compact-flash";
89 intel,ixp4xx-eb-t1 = <3>; // 3 cycles extra address phase
90 intel,ixp4xx-eb-t2 = <3>; // 3 cycles extra setup phase
91 intel,ixp4xx-eb-t3 = <15>; // 15 cycles extra strobe phase
92 intel,ixp4xx-eb-t4 = <3>; // 3 cycles extra hold phase
93 intel,ixp4xx-eb-t5 = <15>; // 15 cycles extra recovery phas
[all...] |
| intel-ixp4xx.dtsi | 3 * Device Tree file for Intel XScale Network Processors
45 compatible = "intel,ixp4xx-ahb-queue-manager";
87 compatible = "intel,xscale-uart";
101 compatible = "intel,xscale-uart";
115 compatible = "intel,ixp4xx-gpio";
136 compatible = "intel,ixp4xx-timer";
142 compatible = "intel,ixp4xx-network-processing-engine";
147 compatible = "intel,ixp4xx-crypto";
148 intel,npe-handle = <&npe 2>;
156 compatible = "intel,ixp4xx-ethernet"
[all...] |
| intel-ixp42x-netgear-wg302v2.dts | 9 #include "intel-ixp42x.dtsi"
14 compatible = "netgear,wg302v2", "intel,ixp42x";
38 compatible = "intel,ixp4xx-flash", "cfi-flash";
47 intel,ixp4xx-eb-write-enable = <1>;
|
| intel-ixp42x-adi-coyote.dts | 10 #include "intel-ixp42x.dtsi"
15 compatible = "adieng,coyote", "intel,ixp42x";
39 compatible = "intel,ixp4xx-flash", "cfi-flash";
48 intel,ixp4xx-eb-write-enable = <1>;
|
| intel-ixp42x-ixdpg425.dts | 3 * Device Tree file for the Intel IXDPG425 reference design.
17 #include "intel-ixp42x.dtsi"
21 model = "Intel IXDPG425 reference design";
22 compatible = "intel,ixdpg425", "intel,ixp42x";
44 compatible = "intel,ixp4xx-flash", "cfi-flash";
53 intel,ixp4xx-eb-write-enable = <1>;
|
| intel-ixp42x-iomega-nas100d.dts | 8 #include "intel-ixp42x.dtsi"
13 compatible = "iom,nas-100d", "intel,ixp42x";
95 compatible = "intel,ixp4xx-flash", "cfi-flash";
|
| intel-ixp42x-freecom-fsg-3.dts | 10 #include "intel-ixp42x.dtsi"
15 compatible = "freecom,fsg-3", "intel,ixp42x";
87 compatible = "intel,ixp4xx-flash", "cfi-flash";
90 intel,ixp4xx-eb-write-enable = <1>;
|
| intel-ixp42x-linksys-wrv54g.dts | 11 #include "intel-ixp42x.dtsi"
16 compatible = "linksys,wrv54g", "gemtek,gtwx5715", "intel,ixp42x";
85 compatible = "intel,ixp4xx-flash", "cfi-flash";
88 intel,ixp4xx-eb-write-enable = <1>;
|
| intel-ixp42x-linksys-nslu2.dts | 8 #include "intel-ixp42x.dtsi"
13 compatible = "linksys,nslu2", "intel,ixp42x";
102 compatible = "intel,ixp4xx-flash", "cfi-flash";
|
| pxa168.dtsi | 59 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
69 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
79 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
|
| pxa910.dtsi | 71 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
81 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
91 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
|
| aspeed-bmc-intel-s2600wf.dts | 2 // Copyright (c) 2017 Intel Corporation
9 compatible = "intel,s2600wf-bmc", "aspeed,ast2500";
|
| pxa25x.dtsi | 59 compatible = "intel,pxa25x-gpio";
|
| mmp2.dtsi | 290 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
300 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
310 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
320 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
|
| mmp3.dtsi | 359 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
369 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
379 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
389 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
|
| pxa27x.dtsi | 33 compatible = "intel,pxa27x-gpio";
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/ |
| Makefile | 17 subdir-y += intel
|
| /src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/mti/ |
| malta.dts | 45 compatible = "intel,i8259";
55 compatible = "intel,dt28f160", "cfi-flash";
|
| /src/sys/external/mit/xen-include-public/dist/xen/include/public/arch-x86/ |
| pmu.h | 47 /* Intel PMU registers and structures */
58 * xen_pmu_arch.c.intel).
144 struct xen_pmu_intel_ctxt intel; member in union:xen_pmu_arch::__anon3a1d6ae3030a
|
| /src/sys/external/bsd/drm/dist/scripts/ |
| create_lk_gpu.sh | 54 mv intel*.[ch] i915/
|
| /src/sys/arch/amd64/ |
| Makefile | 26 -find -H ${SYSDIR}/external/intel-public/acpica/dist/ -name '*.[ch]' | \
|
